- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374986 > XC4005-36XL (Xilinx, Inc.) XC4000XL Electrical Specifications PDF資料下載
參數(shù)資料
| 型號： | XC4005-36XL |
| 廠商： | Xilinx, Inc. |
| 英文描述： | XC4000XL Electrical Specifications |
| 中文描述： | XC4000XL電氣規(guī)格 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 76K |
| 代理商： | XC4005-36XL |
R
DS005 (v. 1.8 October 18, 1999 - Product Specification
6-75
XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4000XL A.C. Characteristics
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Internal timing parameters are derived from measuring internal test patterns. Listed below are
representative values where one global clock input drives one vertical clock line in each accessible column, and where all
accessible IOB and CLB flip-flops are clocked by the global clock net.
6
When fewer vertical clock lines are connected, the clock distribution is faster; when multiple clock lines per column are driven
from the same global clock, the delay is longer. For more specific, more precise, and worst-case guaranteed data, reflecting
the actual routing structure, use the values provided by the static timing analyzer (TRCE in the Xilinx Development System)
and back-annotated to the simulation netlist. These path delays, provided as a guideline, have been extracted from the static
timing analyzer report. All timing parameters assume worst-case operating conditions (supply voltage and junction
temperature. Values apply to all XC4000XL devices and are expressed in nanoseconds unless otherwise noted.
Global Low Skew Buffer to Clock K
Speed Grade
Description
Delay from pad through GLS buffer to
any clock input, K
All
Min
0.3
0.4
0.5
0.6
0.7
0.9
1.1
1.3
1.4
1.6
-3
-2
-1
-09
Max
1.5
1.9
2.3
2.6
2.9
3.2
3.5
3.9
4.4
4.6
5.5
-08
Max
Units
Symbol
T
GLS
Device
XC4002XL
XC4005XL
XC4010XL
XC4013XL
XC4020XL
XC4028XL
XC4036XL
XC4044XL
XC4052XL
XC4062XL
XC4085XL
Max
2.1
2.7
3.2
3.6
4.0
4.4
4.8
5.3
5.7
6.3
7.2
Max
1.8
2.3
2.8
3.1
3.5
3.8
4.2
4.6
5.0
5.4
6.2
Max
1.6
2.0
2.4
2.7
3.0
3.3
3.6
4.0
4.5
4.7
5.7
2.3
3.1
4.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC4010E | XC4000E and XC4000X Series Field Programmable Gate Arrays |
| XC4010E-4PG191C | XC4000E and XC4000X Series Field Programmable Gate Arrays |
| XC4002XL | XC4000E and XC4000X Series Field Programmable Gate Arrays |
| XC4003E | XC4000E and XC4000X Series Field Programmable Gate Arrays |
| XC4005E | XC4000E and XC4000X Series Field Programmable Gate Arrays |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC40054PC84C | 制造商:XILINX 功能描述:* |
| XC4005-4PC84C | 制造商:Xilinx 功能描述: |
| XC4005-4PG156C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
| XC40054PQ160C | 制造商:XILINX 功能描述:* |
| XC4005-4PQ160C | 制造商:Xilinx 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。