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參數(shù)資料
| 型號(hào)： | XC3S1000-4VQ100C |
| 廠商： | XILINX INC |
| 元件分類(lèi)： | FPGA |
| 英文描述： | Spartan-3 FPGA Family: Complete Data Sheet |
| 中文描述： | FPGA, 192 CLBS, 50000 GATES, PQFP100 |
| 封裝： | VQFP-100 |
| 文件頁(yè)數(shù)： | 196/198頁(yè) |
| 文件大?。?/td> | 1605K |
| 代理商： | XC3S1000-4VQ100C |
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Spartan-3 FPGA Family: Pinout Descriptions
110
www.xilinx.com
DS099-4 (v1.6) January 17, 2005
Product Specification
R
Revision History
Date
Version No.
Description
04/03/03
1.0
Initial Xilinx release.
04/21/03
1.1
Added information on the VQ100 package footprint, including a complete pinout table
(
Table 17
) and footprint diagram (
Figure 8
).
Updated
Table 16
with final I/O counts for the VQ100 package. Also added final differential I/O
pair counts for the TQ144 package.
Added clarifying comments to HSWAP_EN pin description on
page 13
.
Updated the footprint diagram for the FG900 package shown in
Figure 16a
and
Figure 16b
.
Some thick lines separating I/O banks were incorrect.
Made cosmetic changes to
Figure 1
,
Figure 3
, and
Figure 4
.
Updated Xilinx hypertext links.
Added XC3S200 and XC3S400 to Pin Name column in
Table 21
.
05/12/03
1.1.1
AM32 pin was missing GND label in FG1156 package diagram (
Figure 17
).
07/11/03
1.1.2
Corrected misspellings of GCLK in
Table 1
and
Table 2
. Changed CMOS25 to LVCMOS25 in
Dual-Purpose Pin I/O Standard During Configuration
section. Clarified references to
Module 2. For XC3S5000 in FG1156 package, corrected N.C. symbol to a black square in
Table 40
, key, and package drawing.
07/29/03
1.2
Corrected pin names on FG1156 package. Some package balls incorrectly included LVDS pair
names. The affected balls on the FG1156 package include G1, G2, G33, G34, U9, U10, U25,
U26, V9, V10, V25, V26, AH1, AH2, AH33, AH34. The number of LVDS pairs is unaffected.
Modified affected balls and re-sorted rows in
Table 40
. Updated affected balls in
Figure 17
.
Also updated ASCII and Excel electronic versions of FG1156 pinout.
08/19/03
1.2.1
Removed 100 MHz ConfigRate option in
CCLK: Configuration Clock
section and in
Table 11
.
Added note that TDO is a totem-pole output in
Table 9
.
10/09/03
1.2.2
Some pins had incorrect bank designations and were improperly sorted in
Table 23
. No pin
names or functions changed. Renamed DCI_IN to DCI and added black diamond to N.C. pins
in
Table 23
. In
Figure 11
, removed some extraneous text from pin 106 and corrected spelling
of pins 45, 48, and 81.
12/17/03
1.3
Added FG320 pin tables and pinout diagram (
FG320: 320-lead Fine-pitch Ball Grid Array
).
Made cosmetic changes to the TQ144 footprint (
Figure 10
), the PQ208 footprint (
Figure 11
),
the FG676 footprint (
Figure 15
), and the FG900 footprint (
Figure 16
). Clarified wording in
Precautions When Using the JTAG Port in 3.3V Environments
section.
02/27/04
1.4
Clarified wording in
Using JTAG Port After Configuration
section. In
Table 12
, reduced
package height for FG320 and increased maximum I/O values for the FG676, FG900, and
FG1156 packages.
07/13/04
1.5
Added information on lead-free (Pb-free) package options to the
Package Overview
section
plus
Table 12
and
Table 14
. Clarified the VRN_# reference resistor requirements for I/O
standards that use single termination as described in the
DCI Termination Types
section and
in
Figure 3b
. Graduated from Advance Product Specification to Product Specification.
08/24/04
1.5.1
Removed XC3S2000 references from
FG1156: 1156-lead Fine-pitch Ball Grid Array
.
01/17/05
1.6
Added XC3S50 in CP132 package option. Added XC3S2000 in FG456 package option. Added
XC3S4000 in FG676 package option. Added
Selecting the Right Package Option
section.
Modified or added
Table 12
,
Table 14
,
Table 15
,
Table 16
,
Table 19
,
Table 20
,
Table 30
,
Table 32
,
Table 33
,
Table 36
,
Figure 9
, and
Figure 15
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XC3S1000-4VQ100I | Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-4VQG100C | Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-4VQG100I | Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-5CP132C | Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-5CP132I | Spartan-3 FPGA Family: Complete Data Sheet |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC3S1000-4VQ100I | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan-3 FPGA |
| XC3S1000-4VQG100C | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-4VQG100I | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan-3 FPGA Family: Complete Data Sheet |
| XC3S1000-5CP132C | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan-3 FPGA |
| XC3S1000-5CP132I | 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan-3 FPGA |
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