參數(shù)資料
型號(hào): W925E625
英文描述: Telephone Controller
中文描述: 電話控制器
文件頁數(shù): 58/71頁
文件大?。?/td> 1055K
代理商: W925E625
W925E/C625
8-bit CID Microcontroller
Revision : A6
-58-
Release Date : 2002/7/2
CIDGD
CIDGA<2:0>
CIDGA.3
CIDGD
CIDGA
Rising latch
Figure 6-25 Internal CID Gain Control Register Setting Waveform
DTMFR1
DTMFR1[7:4] are reserved bits and must be 0000b.
Bit3~Bit0
Acceptable error percentage to sample 4 period of Row freq.
0000
0.6% (default)
0001
2.5%
001X
3.5%
01XX
Reserved
1XXX
Reserved
DTMFR2
Bit3~Bit0
Acceptable error percentage to sample 4 period of Col freq.
0000
0.5% (default)
0001
1.5%
001X
2.5%
01XX
Reserved
1XXX
Reserved
The acceptable error percentage may have small variation by different test environments.
DTMFR2.4=0 DTMF receiver works as a DTMF receiver
DTMFR2.4=1 DTMF receiver works as a tone detector
DTMFR2.5=0 DTMF PT counter is up counter type, change of detected frequency
does not effect counter
DTMFR2.5=1 DTMF PT counter is up counter type, change of detected frequency
resets DTMF PT counter
DTMFR2.6=0 DTMF AT counter is up-down counter type, up counting when no
DTMF detected, down counting if DTMF detected again.
DTMFR2.6=1 DTMF AT counter is up counter type, up counting when no DTMF
detected, pause counting if DTMF detected again.
DTMFR2.7: reserved
There are 4 programmable gain arrays, shown in Figure 6-17, are determined by Low/High
nibbles of PGxx. The following table lists the input gain corresponding to the value of L/H nibble
of PGxx.
X
20 log((40+15*X)/(230-(40+15*X))) dB
X
20 log((40+15*X)/(230-(40+15*X))) dB
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