
W925E/C625
8-bit CID Microcontroller
6.4
Revision : A6
-32-
Release Date : 2002/7/2
Instruction
The W925E/C625 executes all the instructions of the standard 8032 family. However, timing of
these instructions is different. In the W925E/C625, each machine cycle consists of 4 clock
periods, while in the standard 8032 it consists of 12 clock periods. Also, in the W925E/C625 there
is only one fetch per machine cycle i.e. 4 clocks per fetch, while in the standard 8032 there can
be two fetches per machine cycle, which works out to 6 clocks per fetch.
Table 2 Instructions that affect Flag settings
Instruction
Carry
Overflow
Auxiliary
Carry
INC,DEC
-
-
-
ADD
X
X
X
ADDC
X
X
X
SUBB
X
X
X
MUL
0
X
DIV
0
X
DA A
X
RRC A
X
RLC A
X
A "X" indicates that the modification is as per the result of instruction.
A "-" indicates that the flag is not effected by the instruction.Table 3 Instruction Timing for
W925E/C625
Instruction
HEX
Op-Code
Cycles
NOP
00
1
1
ADD A, R0
28
1
1
ADD A, R1
29
1
1
ADD A, R2
2A
1
1
ADD A, R3
2B
1
1
ADD A, R4
2C
1
1
ADD A, R5
2D
1
1
ADD A, R6
2E
1
1
ADD A, R7
2F
1
1
ADD A, @R0
26
1
1
ADD A, @R1
27
1
1
ADD A, direct
25
2
2
ADD A, #data
24
2
2
ADDC A, R0
38
1
1
ADDC A, R1
39
1
1
ADDC A, R2
3A
1
1
ADDC A, R3
3B
1
1
ADDC A, R4
3C
1
1
ADDC A, R5
3D
1
1
ADDC A, R6
3E
1
1
ADDC A, R7
3F
1
1
ADDC A, @R0
36
1
1
ADDC A, @R1
37
1
1
ADDC A, direct
35
2
2
ADDC A, #data
34
2
2
ACALL addr11
71,91,B1,
11,31,51,
Instruction
Carry
Overflow
Auxiliary
Carry
SETB C
CLR C
CPL C
ANL C, bit
ANL C, bit
ORL C, bit
ORL C, bit
MOV C, bit
CJNE
1
0
X
X
X
X
X
X
X
Bytes Machine
Instruction
HEX
Op-Code
58
59
5A
5B
5C
5D
5E
5F
56
57
55
54
52
53
82
B0
B5
B4
B6
B7
B8
B9
BA
BB
BC
BD
Bytes Machine
Cycles
1
1
1
1
1
1
1
1
1
1
2
2
2
3
2
2
4
4
4
4
4
4
4
4
4
4
ANL A, R0
ANL A, R1
ANL A, R2
ANL A, R3
ANL A, R4
ANL A, R5
ANL A, R6
ANL A, R7
ANL A, @R0
ANL A, @R1
ANL A, direct
ANL A, #data
ANL direct, A
ANL direct, #data
ANL C, bit
ANL C, /bit
CJNE A, direct, rel
CJNE A, #data, rel
CJNE @R0, #data, rel
CJNE @R1, #data, rel
CJNE R0, #data, rel
CJNE R1, #data, rel
CJNE R2, #data, rel
CJNE R3, #data, rel
CJNE R4, #data, rel
CJNE R5, #data, rel
1
1
1
1
1
1
1
1
1
1
2
2
2
3
2
2
3
3
3
3
3
3
3
3
3
3
2
3