
W925E/C625
8-bit CID Microcontroller
Revision : A6
-26-
Release Date : 2002/7/2
Bit:
7
6
5
4
3
2
1
0
SF1
LCDON
REGON
REN1
SFQ
SEDG
CLKIO
SIO
Mnemonic: SCON1
Address: C0h
SF1: Serial port interrupt flag. When 8-bits data is transceived completely, SF1 is set by
hardware. SF1 is cleared when serial interrupt routine is executed or cleared by software.
LCDON: LCD waveform enable control. 0 to Disable LCD display, 1 to Enable LCD display.
REGON: Regulator on/off control. 0 to disable regulator, 1 to regulator.
REN1: Set REN1 from 0 to 1 to start the serial port1 to receive 8-bit serial data.
SFQ: SFQ=0 Serial clock output frequency is equal to f
OSC
/2
SFQ=1 Serial clock output frequency is equal to f
OSC
/256
SEDG: SEDG=0 Serial data latched at falling edge of clock, SCLK=Low initially.
SEDG=1 Serial data latched at rising edge of clock, SCLK=High initially.
CLKIO: CLKIO=0 P4.0(SCLK) work as output mode
CLKIO=1 P4.0(SCLK) work as input mode
SIO:
SIO=0 P4.0 & P4.1 work as normal I/O pin
SIO=1 P4.0 & P4.1 work as Serial port1 function
SERIAL DATA BUFFER 1
(initial=00H)
Read Only
Bit:
7
6
5
4
3
2
1
0
SBUF1.7 SBUF1.6 SBUF1.5 SBUF1.4 SBUF1.3 SBUF1.2 SBUF1.1 SBUF1.0
Mnemonic: SBUF1
Address: C1h
SBUF1.7-0: Serial data on the serial port 1 is read from or written to this location. It actually
consists of two separate internal 8-bit registers. One is the receive register, and the
other is the transmit buffer. Any read access gets data from the receive data buffer,
while write access is to the transmit data buffer.
REGULATOR VOLTAGE CONTROL REGISTER
(initial=00H)
Bit:
7
-
6
-
5
-
4
-
3
2
1
0
REGVC.3 REGVC.2 REGVC.1 REGVC.0
Mnemonic: REGVC
Address: C2h
REGVC.3-0: 4 bits to tune the regulator output voltage.
POWER MANAGEMENT REGISTER
(initial=XXX00XX1B)
Bit:
7
6
5
4
3
2
-
1
-
0
-
XT/RG
RGMD
RGSL
X2OFF
X1OFF
Mnemonic: PMR
Address: C4h
XT/RG:Crystal/RC Oscillator Select. Setting this bit selects crystal or external clock as system
clock source. Clearing this bit selects the on-chip RC oscillator as clock source. X1UP
(STATUS.4) must be set to 1 and X1OFF (PMR.3) must be cleared before this bit can be
set. Attempts to set this bit without obeying these conditions will be ignored.
This bit is
set to 1 after a power-on or reset pin reset and unchanged by WDT reset.
RGMD: RC Mode Status. This bit indicates the current clock source of micro-controller. When
cleared, CPU is operating from the external crystal or oscillator. When set, CPU is