參數(shù)資料
型號(hào): W19B160BTBBM
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 1M X 16 FLASH 2.7V PROM, 11 ns, PBGA48
封裝: 6 X 8 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-48
文件頁(yè)數(shù): 6/48頁(yè)
文件大?。?/td> 534K
代理商: W19B160BTBBM
W19B160BT/B DATA SHEET
- 14 -
As the Embedded Erase algorithm is complete, the device returns to reading array data and
addresses are no longer latched. Please refer to the Write Operation Status section for information on
these status bits.
However, a hardware reset shall terminate the erase operation immediately. If this occurs, to ensure
data integrity, the sector erase command sequence should be reinitiated once the device has returned
to reading array data.
6.2.7
Erase Suspend /Erase Resume Commands
The Erase Suspend Command allows the system to interrupt a sector erase operation and then read
data from, or program data to, any sector not selected for erasure. This command is valid only during
the sector erase operation, including the 50us time out period during the sector erase command
sequence. The Erase Suspend Command is ignored if written during the chip erase operation or
embedded program algorithm. Writing the Erase Suspend Command during the Sector Erase time-out
immediately terminals the time-out period and suspends the erase operation. Addresses are as don’t
cares when writer the Erase Suspend Command.
When the Erase Suspend Command is written during a sector erase operation, the device requires a
maximum of 20us to suspend the erase operation. However, when the Erase Suspend Command is
written during the sector erase time-out, the device immediately terminates the time-out period and
suspends the erase operation.
After the erase operation has been suspended, the system can read array data from or program data
to any sector not selected for erasure. (The device “erase suspends” all sectors selected for erasure.)
Normal read and writes timings and command definitions apply. Reading at any address within erase-
suspended sectors produces status data on DQ7-DQ0. The system can use DQ7, or DQ6 and DQ2
together, to determine if a sector is actively erasing or is erase-suspended. See Write Operation
Status for information on these status bits.
After an erase-suspended program operation is complete, the system can once again read array data
within non-suspended sectors. The system can determine the status of the program operation using
the DQ7 or DQ6 status bits, just as in the standard program operation. See Write Operation Status for
more information.
The system may also write the auto-select command sequence when the device is in the erase
suspend mode. The device allows reading auto-select codes even at addresses within erasing
sectors, since the codes are not stored in the memory array. When the device exits the auto-select
mode, the device reverts to the erase suspend mode, and is ready for another valid operation. See
Auto-select Command Sequence for more information.
The system must write the erase resume command (address bits are don’t care) to exit the erase
suspend mode and continue the sector erase operation. Further writes of the resume command are
ignored. Another Erase Suspend Command can be written after the device has resumed erasing.
6.2.8
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to program bytes or words to the device faster than
using the standard program command sequence. The unlock bypass command sequence is initiated
by first writing two unlock cycles. This is followed by a third write cycle containing the unlock bypass
command, 20h. The device enters the unlock bypass command mode. A two-cycle unlock bypass
program command sequence is all that is required to program in this mode. The first cycle in this
sequence contains the unlock bypass program command, A0h; the second cycle contains the
program address and data. Additional data is programmed in the same manner. This mode dispenses
相關(guān)PDF資料
PDF描述
W7MG21M32SVB70BNC 2M X 32 FLASH 3.3V PROM MODULE, 70 ns, SMA80
W3EG7264S202AD4 DDR DRAM MODULE, DMA200
W3E232M16S-200STIG 64M X 16 DDR DRAM, 0.7 ns, PDSO66
W3E232M16S-400STI 64M X 16 DDR DRAM, 0.7 ns, PDSO66
W3EG6418S263D3 16M X 64 DDR DRAM MODULE, 0.75 ns, DMA184
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W19B160BTBH7H 制造商:WINBOND 制造商全稱:Winbond 功能描述:16Mbit, 2.7~3.6 volt CMOS flash memory
W19B160BTBM7H 制造商:WINBOND 制造商全稱:Winbond 功能描述:16Mbit, 2.7~3.6 volt CMOS flash memory
W19B160BTT7H 制造商:WINBOND 制造商全稱:Winbond 功能描述:2.7~3.6-volt write (program and erase) operations, Fast write operation
W19B160TB7H7H 制造商:WINBOND 制造商全稱:Winbond 功能描述:16Mbit, 2.7~3.6 volt CMOS flash memory
W19B160TB7M7H 制造商:WINBOND 制造商全稱:Winbond 功能描述:16Mbit, 2.7~3.6 volt CMOS flash memory