參數(shù)資料
型號: W19B160BTBBM
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 1M X 16 FLASH 2.7V PROM, 11 ns, PBGA48
封裝: 6 X 8 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-48
文件頁數(shù): 31/48頁
文件大小: 534K
代理商: W19B160BTBBM
W19B160BT/B DATA SHEET
Publication Release Date:Jan.04, 2008
- 37 -
Revision A5
9.4.9
Alternate #CE Controlled Erase and Program Operation
70nS
90nS
PARAMETER
SYM.
Min
Typ
(Note 3)
Max
(Note 4)
Min
Typ
(Note 3)
Max
(Note 4)
Unit
Write Cycle Time (Note 1)
TWC
70
-
90
-
ns
Address Setup Time
TAS
0
-
0
-
ns
Address Hold Time
TAH
45
-
45
-
ns
Data Setup Time
TDS
35
-
45
-
ns
Data Hold Time
TDH
0
-
0
-
ns
Output Enable Setup Time
TOES
0
-
0
-
ns
Read Recover Time Before Write
(#OE High to #WE Low)
TGHEL
0
-
0
-
ns
#WE Setup Time
TWS
0
-
0
-
ns
#WE Hold Time
TWH
0
-
0
-
ns
#CE Pulse Width
TCP
35
-
35
-
ns
#CE Pulse Width High
TCPH
30
-
30
-
ns
Byte
TPB
-
5
-
5
-
Programming Time
(Note 6)
Word
TPW
-
7
-
7
-
us
Sector Erase Time (Note 2)
TSE
-
0.7
-
0.7
-
sec
Chip Erase Time (Note 2)
TCE
-
25
-
25
-
sec
Byte
TCPB
-
11
-
11
-
Chip Program Time
(Note 5)
Word
TCPW
-
7.2
-
7.2
-
sec
Notes :
1. Not 100 % tested.
2. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
3. Typical program and erase time assume the following conditions :25℃,3.0 V VDD, 10,000 cycles .Additionally,
programming typicals assume checkerboard pattern.
4. Under worst case conditions of 90℃, VDD =2.7V, 10,000 cycles.
5. The typical chip programming time is considerably less than the maximun chip programming time listed,since most
bytes program faster than maximun program times listed.
6. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command.
7. The device has a minimum erase and program cycle endurance of 10,000 cycles.
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