參數(shù)資料
型號: VG36128161BFL-7L
廠商: VANGUARD INTERNATIONAL SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 8M X 16 SYNCHRONOUS DRAM, 5.4 ns, PBGA54
封裝: 10 X 9 MM, VFBGA-54
文件頁數(shù): 9/69頁
文件大小: 1335K
代理商: VG36128161BFL-7L
Document :1G5-0183
Rev.5
Page 17
VIS
VG36128401B / VG36128801B / VG36128161B
CMOS Synchronous Dynamic RAM
6. Burst Length and Sequence
(Burst of Two)
(Burst of Four)
(Burst of Eight)
Full page burst is an extension of the above tables of sequential addressing, with the length being 2,048
(for 32Mx4), 1,024 (for 16M x 8) and 512 (for 8Mx16).
Starting Address
(column address A0, binary)
Sequential Addressing
Sequence (decimal)
Interleave Addressing Sequence
(decimal)
0
0, 1
1
1, 0
Starting Address
(column address A1 - A0, binary)
Sequential Addressing
Sequence (decimal)
Interleave Addressing Sequence (decimal)
00
0, 1, 2, 3
01
1, 2, 3, 0
1, 0, 3, 2
10
2, 3, 0, 1
11
3, 0, 1, 2
3, 2, 1, 0
Starting Address
(column address A2 - A0, binary)
Sequential Addressing
Sequence (decimal)
Interleave Addressing Sequence
(decimal)
000
0, 1, 2, 3, 4, 5, 6, 7
001
1, 2, 3, 4, 5, 6, 7, 0
1, 0, 3, 2, 5, 4, 7, 6
010
2, 3, 4, 5, 6, 7, 0, 1
2, 3, 0, 1, 6, 7, 4, 5
011
3, 4, 5, 6, 7, 0, 1 ,2
3, 2, 1, 0, 7, 6, 5, 4
100
4, 5, 6, 7, 0, 1, 2, 3
101
5, 6 ,7, 0, 1, 2, 3, 4
5, 4, 7, 6, 1, 0, 3, 2
110
6, 7 ,0 ,1 ,2 ,3 ,4 ,5
6, 7, 4, 5, 2, 3, 0, 1
111
7, 0, 1, 2, 3, 4, 5, 6
7, 6, 5, 4, 3, 2, 1, 0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VG36128161BT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128401A 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128401BT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128801A 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36128801BT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM