參數(shù)資料
型號: VDP3130Y
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
英文描述: Video Processor Family
中文描述: 視頻處理器系列
文件頁數(shù): 32/76頁
文件大小: 1770K
代理商: VDP3130Y
VDP 313xY
ADVANCE INFORMATION
32
Micronas
Table 2
5:
I
2
C control and status registers of the video backend
(Registers are set to
0
at reset, default values are recommendations)
I
2
C Sub
address
(hex)
Number
of bits
Mode
Function
Default
Name
(hex)
Luminance Channel
61
9
w v
bit[5:0]
0..63/32 main contrast setting
32
CTM
65
9
w v
bit[5:0]
0..63/32 side contrast setting
32
CTS
51
9
w v
bit[8:0]
256..255 main brightness setting
0
BRM
55
9
w v
bit[8:0]
256..255 side brightness setting
0
BRS
7D
9
w v
bit[7]
0/1
enable/disable black level
expander
0
BLE
59
9
w v
black level expander:
bit[3:0]
bit[8:4]
0..15
0...31
tilt coefficient
amount
8
12
BLE1
BTLT
BAM
5D
9
w v
black level expander:
bit[8:0]
0..511
disable expansion, threshold
value
200
BLE2
BTHR
73
9
w v
black level expander measurement
bit[7:0]
0..255
bit[8]
0/1
vstart
50/60 Hz measurement
windowlength
start line = vstart
stop line = 336/283
vstart (or vertical sync)
0
15
BLE3
BWL
BVST
69
9
w v
luma peaking filter, the gain at high frequencies and
small signal amplitudes is: 1 + (k1+k2)/8
bit[3:0]
0..15
k1: peaking level undershoot
bit[7:4]
0..15
k2: peaking level overshoot
bit[8]
0/1
peaking value normal/inverted
(peaking/softening)
4
4
0
PK1
PKUN
PKOV
PKINV
6D
9
w v
luma peaking filter, coring
bit[4:0]
0..31
bit[7:5]
bit[8]
0/1
coring level
reserved
peaking filter center frequency
high/low
3
0
PK2
COR
PFS
41
9
w v
luma soft limiter, slope A and B
bit[3:0]
bit[7:4]
slope segment A
slope segment B
0
0
LSL1
LSLSA
LSLSB
45
9
w v
luma soft limiter, absolute limit
bit[7:0]
luma soft limiter absolute limit
(unsigned)
modulation off/on
bit[8]
0/1
255
1
LSL2
LSLAL
LSLM
4D
9
w v
bit[8:0]
luma soft limiter segment A tilt point
(unsigned)
250
LSLTA
49
9
w v
bit[8:0]
luma soft limiter segment B tilt point
(unsigned)
300
LSLTB
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