參數(shù)資料
型號(hào)： V54C316162VB
廠商： Mosel Vitelic, Corp.
英文描述： High Performance 3.3 Volt 1M X 16 Synchronous DRAM(3.3V高性能1Mx16同步動(dòng)態(tài)RAM)
中文描述： 高性能3.3伏100萬(wàn)× 16同步DRAM（3.3V的高性能1Mx16同步動(dòng)態(tài)RAM）的
文件頁(yè)數(shù)： 8/61頁(yè)
文件大?。?/td> 571K
代理商： V54C316162VB
8
V54C316162VB Rev. 1.0 July 1998
MOSEL V ITELIC
V54C316162VB
two clocks for CAS latencies of 3. If CA10 is high
when a Write Command is issued, the
Auto-Precharge
function is initiated. The SDRAM
automatically enters the precharge operation one
clock delay from the last data-in for CAS latencies
of 1 and 2 and two clocks for CAS latencies of 3.
This delay is referenced as t
Write with
DPL
.
Precharge Command
If CA10 is low, the chip needs another way to pre-
charge. In this mode, a separate precharge com-
mand is necessary. When RAS and WE are low and
CAS is high at a clock timing, it triggers the pre-
charge operation. Two address bits, A10 and A11,
are used to define banks as shown in the following
list. The precharge command may be applied coin-
cident with the last of burst reads for CAS Latency
= 1 and with the second to the last read data for
CAS Latencies = 2 & 3. Writes require a time t
from the last burst data to apply the precharge com-
mand.
Bank Selection by Address Bits
A10
Bank A Only
Low
Bank B Only
Low
Both A and B
High
DPL
A11
Low
High
Don’t Care
Power Up Procedure
All V
CC
and V
CCQ
must reach the specified volt-
age no later than any of input signal voltages. An ini-
tial pause of 200
m
sec is required after power on. All
banks have to be precharged and a minimum of 2
auto-refresh cycles are required prior to the mode
register set operation.
Recommended Operation and Characteristics
T
A
= 0 to 70
°
C; V
SS
= 0 V; V
CC
,V
CCQ
= 3.3 V
±
0.3 V
Notes:
1.
2.
3.
Under all conditions V
must be less than or equal to V
CC
.
All voltages are referenced to V
.
Vih may overshoot to V
+ 2.0 V for pulse width of < 4ns with 3.3V. Vil may undershoot to -2.0 V for pulse width < 4.0 ns with 3.3V.
Pulse width measured at 50% points with amplitude measured peak to DC reference.
Symbol
Parameter
Limit Values
Unit
Notes
Min.
Typ.
Max.
V
CC
Power supply voltage
3.0
3.3
3.6
V
V
CCQ
Output supply voltage
3.0
3.3
3.6
V
1
V
IH
Input high voltage
2.0
V
CC
+0.3
V
2, 3
V
IL
Input low voltage
– 0.3
0.8
V
2, 3
V
OH
Output high voltage (I
OUT
= – 2.0 mA)
2.4
–
V
V
OL
Output low voltage (I
OUT
= 2.0 mA)
–
0.4
V
I
I(L)
Input leakage current, any input
(0 V < V
IN
< 3.6 V, all other inputs = 0 V)
– 1
1
mA
I
O(L)
Output leakage current
(I/O is disabled, 0 V < V
OUT
< V
CC
)
– 1
1
mA
相關(guān)PDF資料
PDF描述
V54C316162 200/183/166/143 MHz 3.3 VOLT, 4K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
V54C316162VC-5 200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
V54C316162VC-55 200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
V54C316162VC-6 200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
V54C316162VC-7 200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
V54C316162VC 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
V54C316162VC-5 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
V54C316162VC-55 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
V54C316162VC-6 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
V54C316162VC-7 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16
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