
U
LTRA
C
HIP
High-Voltage Mixed-Signal IC
2000
6
Product Specifications
Name
Type
Pins
Description
C
ONFIGURATION
P
INS
PS[1:0]
C
Parallel/Serial.
Serial modes:
Parallel modes: “HL”: 8080
“LL”: serial (S8)
“LH”: 2-wire serial (I
2
C)
“HH”: 6800
V
DD1
S
For configuration purpose
T
EST
P
INS
TP3
I
Test control. Connect to GND.
TP[2:0]
I
Test control. Leave these pins open during normal use.
TST[3:1]
I/O
Test I/O pins. Leave these pins open during normal use.
H
OST
I
NTERFACE
V
DD1
S
Use for configuration purpose.
CS0/A0
CS1/A1
I
Chip Select or Chip Address. In parallel mode and S8 mode, chip is
selected when CS0=”L” and CS1=”H”.
In I
2
C mode, A[1:0] specifies bit 3~2 of UC1602I’s device address.
When the chip is not selected, D[7:0] will be high impedance.
RST
I
When RST=”L”, all control registers are re-initialized by their default
states and/or by their pin configurations if applicable.
When RST is not used, connect the pin to V
DD1
.
CD
I
Select Control data or Display data for read/write operation. CD pin is
not used in I
C modes, connect it to V
DD
or V
SS.
”L”: Control data
”H”: Display data
WR0
WR1
I
WR[1:0] controls the read/write operation of the host interface.
In parallel mode, WR[1:0] meaning depends on whether the interface is
in the 6800 mode or the 8080 mode.
In serial interface modes, these two pins are not used. Connect to V
SS
.
D0~D7
I/O
Bi-directional bus for both serial and parallel host interfaces.
In S8 mode, connect unused pins to V
DD
or V
SS
. In I2C mode, connect
D[1:0] to SCK, and D[5:2] to SDA, and D[7:6] to V
DD
or V
SS
.
In I
2
C mode, SDA and SCK are in open-drain mode. Pull up resistors are
required on the bus. In COG applications, be careful to control ITO trace
resistance, as it will affect effective output level of SDA.
PS=1x
D0
D1
D2
D3
D4
D5
D6
D7
PS=0x
SCK
D0
D1
D2
D3
D4
D5
D6
D7
SDA
-
-
N
OTE
Unless otherwise specified, connect all unused input pins and control pins to V
SS
.