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參數(shù)資料
| 型號： | UC1602I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 65x102 Matrix LCD Controller-Driver |
| 中文描述： | 65x102矩陣LCD控制器驅動器 |
| 文件頁數(shù)： | 21/38頁 |
| 文件大小： | 723K |
| 代理商： | UC1602I |
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UC1602I
65x102 Matrix LCD Controller-Drivers
Rev. 0.54 10/12/2001
19
MX I
MPLEMENTATION
Column Mirroring (MX) is implemented by
selecting either (CA) or (101–CA) as the RAM
column address. Changing MX affects the data
written to the RAM.
Since MX has no effect of the data already stored
in RAM, changing MX does not have immediate
effect on the displayed pattern. To refresh the
display, refresh the data stored in RAM after
setting MX.
D
ISPLAY
S
CANNING
During each field of display, depends on the
setting of MR, row electrodes will be scanned in a
fixed pattern at a rate of
(80 x Mux Rate) rows/second
.
During each row period, the signal at the column
drivers determine the ON/OFF status of the row
of pixels being scanned.
R
OW
S
CANNING
Icon data is always outputted via RIC electrodes
before the 1
row of each field. It is then followed
by scanning R1 through R
m
, where
m
may be 64,
or 48 depends on the setting of MR.
Row electrode scanning orders are not affected
by Start Line (SL) or Mirror Y (MY, LC[3]). When
MY is 0, the effect of SL having a value
K
is to
change the mapping of R0 to the
K
-th bit slice of
data stored in display RAM. Visually, SL having a
non-zero value is equivalent to scrolling LCD
display up by SL rows.
RAM A
DDRESS
G
ENERATION
The mapping of the data store in the display
SRAM and the scanning electrodes can be
obtained by combining the fixed R
m
scanning
sequence and the following RAM address
generation formula.
During the display operation, the RAM line
address generation can be mathematically
represented as following:
For the 1
st
line period of each field
Line = Icon Line (40H)
For the 2
nd
line period of each field
Line = SL
Otherwise
Line =
Mod(
Line
+1,
64
)
Where Mod
is the modular operator, and
Line
is
the bit slice line address of RAM to be outputted
to column drivers. Line 0 corresponds to the first
bit-slice of data in RAM.
The above
Line
generation formula produce the
“l(fā)oop around” effect as it effectively resets
Line
to
0 when
Line+1
reaches
64
.
Effects such as page scrolling, page swapping
can be emulated by changing SL dynamically.
MY I
MPLEMENTATION
Row Mirroring (MY) is implemented by reversing
the mapping order between row electrodes and
RAM, i.e. the mathematical address generation
formula becomes:
For the 1
st
line period of each field
Line = Icon Line (40H)
For the 2
nd
line period of each field
Line =
Mod(
SL + MUX-2
,
64
)
where MUX = 65 or 49
Otherwise
Line =
Mod(
Line-1
,
64
)
Visually, the effect of MY is equivalent to flipping
the display upside down. The data stored in
display RAM is not affected by MY.
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