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參數資料
| 型號： | UC1602I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 65x102 Matrix LCD Controller-Driver |
| 中文描述： | 65x102矩陣LCD控制器驅動器 |
| 文件頁數： | 16/38頁 |
| 文件大?。?/td> | 723K |
| 代理商： | UC1602I |
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U
LTRA
C
HIP
High-Voltage Mixed-Signal IC
2000
14
Product Specifications
S
ERIAL
I
NTERFACE
UC1602I supports two serial modes, 4-wire mode
(PS=0), and 2-wire I
C mode (PS=1). The mode
of interface is determined during power-up
process by the value of PS[1:0].
4-
WIER
S
ERIAL
I
NTERFACE
(S8)
Only write operations are supported in 4-wire
serial mode. Pin CS[1-0] are used for chip select
and bus cycle reset. Pin CD is used to determine
the content of the data been transferred. On each
write cycle, 8 bits of data, MSB first, are latched
on eight (8) rising SCK edges into an 8-bit data
holder. If CD=0, the data byte will be decoded as
command. If CD=1, this 8-bit will be treated as
data and transferred to proper address in the
Display Data RAM at the rising edge of the last
SCK pulse.
Pin CD is examined when SCK is pulled low for
the LSB (D0) of each token.
CS1/0
SDI
SCK
CD
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
Figure 6:
4-wire Serial Interface (S8)
2-
WIRE
S
ERIAL
I
NTERFACE
(I
2
C)
When PS[1-0] is set to “LH”, UC1602I is
configured as a slave receiver/transmitter, for
industry standard I
C serial interface.
Each UC1602I I
2
C interface sequence starts with
a START condition (S) from the bus master,
followed by a sequence header, containing a
device address, the direction of transfer (RW,
Write Mode
MPU
0:Write, 1:Read) and mode of transfer (CD,
0:Control, 1:Data).
In this mode, CS[1:0] become A[1:0] and are
used to configure UC1602I’s device address.
WR[1:0] and CD are not used and may be
connected to GND.
MPU
MPU
MPU
MPU
S 0 1 1 1A
1
A
0
C
D0 AD
7
D
0A
… ...
A
A P
Read Mode
MPU
S 0 1 1 1A
MPU
MPU
MPU
MPU
1
A
0
C
D1 AD
7
D
0A
… ...
A
N P
Figure 7
: 2-wire interface protocol
The direction and content of the bytes following
each header byte are fixed for the sequence. To
change the direction (R
ù
W) or the content type
(C
ù
D), start a new interface sequence with a
new header.
After receiving the header, the UC1602I will send
out an acknowledge signal (A). Then, depends
on the setting of the header, the transmitting
device (either the bus master or UC1602I) will
start placing data bits on the serial bus, MSB to
LSB, and the sequence will repeat until a STOP
signal (P, in WRITE), or a Not Acknowledge (N,
in READ mode) is sent by the bus master.
Note that, for data read (CD=1), the first byte of
data is dummy.
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