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參數(shù)資料
| 型號： | TTSI1K16T3TL |
| 英文描述： | 1024-Channel, 16-Highway Time-Slot Interchanger |
| 中文描述： | 1024通道，16道時隙交換器 |
| 文件頁數(shù)： | 23/64頁 |
| 文件大?。?/td> | 1110K |
| 代理商： | TTSI1K16T3TL |
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Preliminary Data Sheet
February 1999
TTSI1K16T
1024-Channel, 16-Highway Time-Slot Interchanger
23
Lucent Technologies Inc.
Low-Latency and Frame-Integrity Modes
Transmit time slots can be selected for low-latency (minimum delay) or for frame-integrity modes using the connec-
tion store memory.
Low Latency
Low latency causes a received time slot to be transmitted as soon as possible. This mode is useful for voice chan-
nels where minimum delay through the network is desirable. If the transmit (Tx) time slot is very close or before the
receive (Rx) time slot, then the data will be transmitted in the next frame. If a particular transmit time slot is physi-
cally later in time than the receive time slot by a certain duration (time-slot separation), then the data will be trans-
mitted in the current frame. The latency will be equal to the separation of the two time slots involved. The maximum
latency that data can encounter through the TSI in low-latency mode is 134
μ
s. If this latency is sufficient for a par-
ticular application, disregard any of the following details.
The required separation that will cause the time slot to be transmitted in the current frame is as follows: the Tx
time-slot position in the physical frame must be greater than or equal to the Rx time-slot position in the physical
frame, by a duration of 2 Rx time slots + (4 + i) x 30.5176 ns, where i is the Tx highway number.
When Rx and Tx highway data rates are equal and the Rx and Tx highway offsets are set to zero, the following
table shows the result of the above relationship for various Tx highways.
Table 8. Time-Slot Separation Required for Transmission with Minimum Latency (0 Offsets)
For example:
I
If data is received in time slot 0 at 2.048 Mbits/s, it could be passed through the device with minimum latency if
transmitted on time slot 3 at 2.048 Mbits/s of TXD0.
I
If data is received in time slot 1 at 4.096 Mbits/s, it could be passed through the device with minimum latency if
transmitted on time slot 4 at 4.096 Mbits/s of TXD8.
I
If data is received in time slot 2 at 8.192 Mbits/s, it could be passed through the device with minimum latency if
transmitted on time slot 5 at 8.192 Mbits/s of TXD15.
If the Rx highway has an offset, then the relationship can be updated. The Rx_time-slot_position is defined as the
Rx_time-slot_number + Rx_highway offset. The new relationship will determine the transmit time-slot position in
the physical frame at which the received data can be transmitted with minimum delay. The new relationship is (i =
Tx highway number):
Tx_time-slot_position
≥
Rx_time-slot_number + Rx highway offset + 2 Rx time slots + (4 + i) x 30.5176 ns
If the Tx highway also has an offset, then the relationship becomes (i = Tx highway number):
Tx_time-slot_number + Tx highway offset
≥
Rx_time-slot_number + Rx highway offset + 2 Rx time slots + (4 + i) x 30.5176 ns
Rx Highway
Data Rate
(Mbits/s)
Tx Highway
Data Rate
(Mbits/s)
Time-Slot (ts) Separation Required for Transmission in
Current Frame on Highway
TXD0
TXD4
TXD8
TXD15
2.048
4.096
8.192
2.048
4.096
8.192
2 ts, 1/4 bit
2 ts, 1/2 bit
2 ts, 1 bit
2 ts, 1/2 bit
2 ts, 1 bit
2 ts, 2 bits
2 ts, 3/4 bit
2 ts, 1 1/2 bits
2 ts, 3 bits
2 ts, 1 1/4 bits
2 ts, 2 1/2 bits
2 ts, 4 3/4 bits
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TTSI1K16T | 1024-Channel, 16-Highway Time-Slot Interchanger(1024通道、16路干線時隙交換機(jī)) |
| TTSI2K32T | 2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T3BAL | 2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T | 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時隙交換機(jī)) |
| TTSI4K32T | 4096-Channel, 32-Highway Time-Slot Interchanger |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TTSI1K16T3TL-DB | 制造商:LSI 功能描述: 制造商:LSI Corporation 功能描述: |
| TTSI2K32T | 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
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