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參數(shù)資料
| 型號： | TTSI1K16T3TL |
| 英文描述： | 1024-Channel, 16-Highway Time-Slot Interchanger |
| 中文描述： | 1024通道，16道時隙交換器 |
| 文件頁數(shù)： | 16/64頁 |
| 文件大?。?/td> | 1110K |
| 代理商： | TTSI1K16T3TL |
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TTSI1K16T
1024-Channel, 16-Highway Time-Slot Interchanger
Preliminary Data Sheet
February 1999
16
Lucent Technologies Inc.
Microprocessor Interface
The host interface is designed to connect directly to a typical synchronous or asynchronous host bus. The interface
to the TTSI1K16T includes a separate clock, PCLK, which is used only in the synchronous interface mode. This
device will be a slave on the host bus and will provide the host microprocessor with the capability to read and write
the TTSI1K16T address space in a minimal number of clock cycles. There is no posting of writes in the host inter-
face, and all registers and the data and connection stores are directly accessible.
Asynchronous Mode (MM = 0)
The following two timing diagrams show read and write in the asynchronous mode.
5-6954(F).r3
Figure 5. Asynchronous Read
5-6955(F)r.3
Figure 6. Asynchronous Write
The presence of AS, CS, and DS being asserted will start the TTSI1K16T internal access. Once data has been
retrieved or written, DT will be asserted indicating the TTSI1K16T is ready to terminate the access. DT will continue
to be asserted until AS, CS, or DS is negated.
The duration of an asynchronous read or write cycle will be a maximum of 183 ns. This duration is measured from
when AS, CS, and DS are all asserted low until DT is asserted low by the TTSI1K16T.
READ DATA
TSI READ ADDRESS
D[7—0]
A[14—0]
CS
AS
R/W
DS
DT
HIGH IMPEDANCE
183 ns MAX
TSI WRITE DATA
TSI WRITE ADDRESS
D[7—0]
A[14—0]
CS
AS
R/W
DS
DT
HIGH IMPEDANCE
183 ns MAX
相關PDF資料 |
PDF描述 |
|---|---|
| TTSI1K16T | 1024-Channel, 16-Highway Time-Slot Interchanger(1024通道、16路干線時隙交換機) |
| TTSI2K32T | 2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T3BAL | 2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T | 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時隙交換機) |
| TTSI4K32T | 4096-Channel, 32-Highway Time-Slot Interchanger |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TTSI1K16T3TL-DB | 制造商:LSI 功能描述: 制造商:LSI Corporation 功能描述: |
| TTSI2K32T | 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI2K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
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