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參數(shù)資料
| 型號： | TSC2302IRGZRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| 封裝： | GREEN, PLASTIC, VQFN-48 |
| 文件頁數(shù)： | 61/85頁 |
| 文件大小： | 1483K |
| 代理商： | TSC2302IRGZRG4 |
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TSC2302
SLAS394 – JULY 2003
The digital decimation filter block includes a high-pass IIR filter for the purpose of removing any dc or
sub-audio-frequency component from the signal. Since such a low frequency filter can have significant settling
time, the filter has an adjustable cutoff frequency, in order to allow the host to set a faster settling time initially,
then later switch it back to a level that does not affect the audio band. The settings for this high-pass filter are:
HPF -3-dB frequency:
0.000019 Fs (0.912 Hz at Fs = 48 kHz)
0.000078 Fs (3.744 Hz at Fs = 48 kHz)
0.1 Fs (4.8 kHz at Fs = 48 kHz)
The filter block provides an audio passband ripple of +/-0.03 dB over a passband from 0 Hz to 0.454 sampling
frequency (Fs), and 70-dB minimum stopband attenuation from 0.548 Fs to 64 Fs.
The ADC modulator and digital filter operate on a clock that changes directly with Fs. This is in contrast to the
DAC, which keeps the modulator running at a high rate of 128 x 44.1 kHz or 128 x 48 kHz even if the incoming
data rate is much lower, such as 8 kHz. Group delay of the ADC path varies with sampling frequency and is
given by 28.7/Fs.
Audio ADC SNR performance is 88-dB-A typical over 20-Hz - 20-kHz bandwidth in 44.1/48-kHz mode with a
3.3-V supply level.
Each audio ADC is preceded by an analog volume control with gain programmable from 20 dB to -40 dB or mute
in 0.5-dB steps using Reg 01h, Pg 2. The input to these volume controls are selected as LLINEIN, RLINEIN,
MICIN, or a mono mix of LLINEIN and RLINEIN through the INML bits (Bits [13:12], Reg 00h, Pg 2). An
additional preamp gain is selectable on the MICIN input as 0 dB, 6 dB, or 12 dB using the MICG bits (Bits [9:8],
Reg 00h, Pg 2).
Audio Bypass Mode
In audio bypass mode, the L/RLINEIN analog inputs can be routed to mix with the DAC output and play to the
headphone outputs (HPL/R) and mono output (MONO). This path has a stereo analog volume control associated
with it, with range settings from 12.0 dB to -35.5 dB in 0.5-dB steps. If the audio ADCs and DACs are not used
while the bypass path is in use, the ADCs and DAC must be powered down to improve noise performance and
reduce power consumption.
This analog volume control has soft-stepping logic associated with it, so that when a volume change is made via
the SPI bus, the logic changes the actual volume incrementally, single-stepping the actual volume up or down
once every 20 sec until it reaches the desired volume level.
This volume control also has similar algorithms as the ADC/DAC volume controls, in that the volume starts at
mute upon power-up, then is slowly single-stepped up to the desired level. At a power-down request, the volume
is slowly single-stepped down to mute before the circuit is actually powered down.
Monophonic Output (MONO)
The mono output of the TSC2302 can be used to drive a power amplifier which drives a low-impedance speaker.
This block can output either a mono mix of the stereo outputs, or the analog input to the left-channel ADC. This
is selected through the MONS bit (Bit 2, Reg 04h, Pg 2). The mono mix of the line outputs is represented by the
equation HPL/2 + HPR/2. Similarly, the mono mix of the analog line inputs is represented by LLINEIN/2 +
RLINEIN/2.
Microphone Bias Voltage (MICBIAS)
The TSC2302 provides an output voltage suitable for biasing an electret microphone capsule. This voltage is
always 1 V below the supply voltage of the part. This output can be disabled through the MIBPD bit (Bit 6, Reg
05h, Pg 2) to reduce power consumption if not used.
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