- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄385949 > TSB42AA4I (Texas Instruments, Inc.) IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER PDF資料下載
參數(shù)資料
| 型號(hào)： | TSB42AA4I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
| 中文描述： | 1394消費(fèi)電子產(chǎn)品鏈路層控制器 |
| 文件頁(yè)數(shù)： | 45/183頁(yè) |
| 文件大?。?/td> | 798K |
| 代理商： | TSB42AA4I |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)當(dāng)前第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)
320
Table 37. HSDI Critical Timing Parameters
DESCRIPTION
Setup time, HSDIx_SYNC to HSDIx_CLK
Setup time, HSDIx_RW to HSDIx_CLK
Setup time, HSDIx_EN to HSDIx_CLK
Setup time, HSDIx_DATA to HSDIx_CLK
Clock frequency, byte wide mode
Clock frequency, serial mode
Hold time, HSDIx_CLK to HSDIx_SYNC
Hold time, HSDIx_CLK to HSDIx_EN
Hold time, HSDIx_CLK to HSDIx_DATA, ADDR
Setup time, address to HSDIx_CLK
HSDIx_CLK to HSDIx_D[7:0], byte wide mode
HSDIx_CLK to HSDIx_D[7:0], serial mode
For HSDI Read operation only
All timing examples are shown with a byte-wide data bus. Serial access would be identical. A full byte must
be written or read before HSDIx_EN can be deactivated.
3.3
PHY-Link Interface
The physical layer interface (PHY) of the ceLynx conforms to the description and definition in Section 5 of
the 1394.a specification. The interface is capable of transmitting and receiving at speeds up to 400 Mbps.
The TI bus holder method of dc isolation is included in the ceLynx device. Only a single capacitor on the
PHY-link interface signals needs to be added to implement isolation.
3.4
Two-Wire Serial Interface
The two-wire serial interface gives the system an easy way to load ceLynx configuration registers on power
up or reset. It also makes manufacturing easy, because the individual global unique ID (GUID) is easier to
implement in EEPROM.
ceLynx automatically reads from the two-wire serial interface port on power up or reset. The host controller
is not involved. The software can also initiate a two-wire serial interface reload by CFR. ceLynx can only
interface to one EEPROM and is always the master. ceLynx samples the SCL pin at power up to determine
if an EEPROM is present. The two-wire serial interface port can be disabled by tying the SCL signal to
ground.
The ceLynx two-wire serial interface consists of two active signals, serial data line (SDA) and serial clock
line (SCL), and an internal ground connection. These two signals interface to any 3.3-V EEPROM designed
for two-wire serial interfaces. Since ceLynx is master, the SCL is used as an output. This clock frequency
is generated by ceLynx and is a maximum of 100 kHz.
When ceLynx performs a read of the two-wire serial interface, the data is written directly to the intended
hardware configuration register. No assistance from the application is necessary. The data and address can
be monitored in the serial STAT0 and serial STAT1 registers for test purposes only. The information in these
registers is valid for one two-wire serial interface clock, or 120 SCLKs.
The 1394 command and status registers that are not implemented in ceLynx hardware, such as the
configuration ROM, can be configured to load from EEPROM to an internal buffer. When the two-wire serial
interface read operation is finished, as signaled by an interrupt, the host controller can load these values
from the data buffer to the correct address space.
3.4.1
Two-Wire Serial-Interface Bus Protocol
A start-condition generated from ceLynx starts an action at the two-wire serial interface-bus. While every
communication is 8 bits, a ninth
bit acknowledge is needed. The first bit is the MSB, the eighth is the LSB.
PARAMETER
t0
t1
t2
t3
MIN
MAX
UNIT
ns
ns
ns
ns
4
12
4.6
4
t4
10 K
10 K
27 M
66 M
Hz
t5
t6
t7
t8
0
0
0
ns
ns
ns
ns
14
12
8
ns
t9
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSB42AA4PDT | IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
| TSB42AA4PGE | IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
| TSB42AA9I | STORAGELYNX 1394 LINK-LAYER CONTROLLER FOR ATA/ATAPI STORAGE PRODUCTS |
| TSB42AA9IPZT | STORAGELYNX 1394 LINK-LAYER CONTROLLER FOR ATA/ATAPI STORAGE PRODUCTS |
| TSB42AB4I | IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSB42AA4IPDT | 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
| TSB42AA4PDT | 功能描述:1394 接口集成電路 1394 Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類(lèi)型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB42AA4PDTG4 | 功能描述:1394 接口集成電路 Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類(lèi)型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB42AA4PDTR | 制造商:Texas Instruments 功能描述: |
| TSB42AA4PGE | 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。