參數(shù)資料
型號(hào): TSB42AA4I
廠商: Texas Instruments, Inc.
英文描述: IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER
中文描述: 1394消費(fèi)電子產(chǎn)品鏈路層控制器
文件頁(yè)數(shù): 132/183頁(yè)
文件大小: 798K
代理商: TSB42AA4I
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635
0x0DC PIDB_FLTRACC – PID B Filter Access
BIT
NAME
TYPE
RESET
FUNCTION
31:0
PIDB_FLTACC
RW
0
PID filter access register – When the PID filter is not enabled, a write
to this register results in an update of the PID filter location displayed
in PIDB_CSR.WRPTR. When the PID filter is enabled, writes to this
register have no effect. A read from this register returns the data from
the PID filter location indicated by PIDB_CSR.RDPTR.
0x0E0 PIDB_CSR – PID B Filter Configuration and Status
BIT
NAME
TYPE
RESET
FUNCTION
31:16
RSVD
R0
0
Reserved – A write to this location has no effect. A read returns 0s.
15:12
RDPTR
RU
0
PID filter read pointer – The value displayed in this register indicates
the register currently accessible for read access via the
microcontroller interface. When the PID filter is not enabled, a read
access to the PIDB_FLTRACC register causes the read pointer to
increment by 1. Enabling the PID filter resets the RDPTR to 0. The
read pointer is not effected by reads while the PID filter is enabled.
11:8
WRPTR
RU
0
PID filter write pointer – The value displayed in this register indicates
the PID filter location that is accessed by the next microcontroller
write. When the PID filter is not enabled, a write to the
PIDB_FLTRACC register causes the write pointer to increment by 1.
When the PID filter is enabled, the write pointer is reset to 0.
7
RSVD
R0
0
Reserved – A write to this location has no effect. A read returns 0.
6:4
WRBUF
RU
0
PIDB write buffer Transport streams that are selected by the PID
filter are routed to one of the eight data buffers as mapped in this
register.
3:2
RSVD
R0
0
Reserved – A write to this location has no effect. A read returns 0s.
1
PIDFLTR_RST
R0
0
PID filter reset – When this bit is set to 1, all of the PID filter
comparison values are set to 0. The read and write pointers are also
set to 0.
0
PIDFLTR_EN
RW
0
PID filter enable – Writing a 1 to this location enables the PID filter
feature. When enabled only transport streams with PID fields that
match the values programmed into the PID filter is written to the
transmit buffer.
0x0E4 INSBUFB_ACC – Packet Insertion Buffer B Access
BIT
NAME
TYPE
RESET
FUNCTION
31:0
INSBUFB_ACC
RW
X
Insertion buffer B access – This register provides the access port to
the insertion packet storage RAM. When packet insertion is not
enabled, the microcontroller can write the insertion packet into the
insertion RAM by accessing this register. Writes to this register
result in an update to the memory location indicated by
INSBUFB_CSR0.WRPTR. Writes to this location, prior to enabling
the packet insertion feature, cause the write pointer to increment
by 1. When the insertion feature is enabled, access to this register
has no effect. The RAM is not initialized at reset.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSB42AA4IPDT 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER
TSB42AA4PDT 功能描述:1394 接口集成電路 1394 Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
TSB42AA4PDTG4 功能描述:1394 接口集成電路 Link Layer Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
TSB42AA4PDTR 制造商:Texas Instruments 功能描述:
TSB42AA4PGE 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER