參數(shù)資料
型號(hào)： TPS65800RTQTG4
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 電源管理
英文描述： 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC56
封裝： 8 X 8 MM, GREEN, PLASTIC, QFN-56
文件頁(yè)數(shù)： 7/98頁(yè)
文件大?。?/td> 2077K
代理商： TPS65800RTQTG4
www.ti.com
ELECTRICAL CHARACTERISTICS – ADC
SLVS606C – SEPTEMBER 2005 – REVISED FEBRUARY 2007
Over recommended operating conditions (typical values at T
J = 25°C), V(ADC_REF) =2.535v if external reference voltage is
used,application circuit as in Figure 3 (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG INPUTS
Full-scale input range, Ch1 to
V(ADC_
VRNG(CH1_5)
Positive inputs (active clamp), full scale ~ 2.535 V
0
Ch5
REF)
V
Full-scale input range, Ch6 to
VINTREF
VRNG(CH6_8)
Positive inputs (active clamp), full scale ~4.7 V
0
Ch8
× 1.854
CIN(ADC)
Input capacitance (all channels)
15
pF
RINADC(CH1_5)
Input resistance
(Ch1 to Ch5)
1
M
ILKGADC(CH1_5) Leakage current
(Ch1 to Ch5)
100
nA
RINADC(CH6_8)
Input resistance
(Ch6 to Ch8)
430
540
k
ILKGADC(CH6_8) Leakage current
(Ch6 to Ch8)
10
A
1.89
TJ = 25°C, ADC channel 5 input voltage
V
5
Internal voltage proportional to
VCH5(ADC)
junction temperature
mV/
Temperature coefficient
6.5
°C
DC ACCURACY
RES(ADC)
Resolution
SAR ADC
10
Bits
MCD(ADC)
No missing codes
SPECIFIED
INL(ADC)
Integral linearity error
±3
LSB
DNL(ADC)
Differential non-linearity error
±1
LSB
Difference between the first code transition (00...00
OFFZERO(ADC) Offset error
5
LSB
to 00...001) and the ideal AGND + 1 LSB
Offset error match between
OFFCH(ADC)
5
LSB
channels
Deviation in code from the ideal full scale code
GAINADC
Gain error
±8
LSB
(11
…111) for the full scale voltage
GAINCH(ADC)
Gain error match
Any two channels
2
LSB
THROUGHPUT SPEED
ADCCLK
Sampling clock
650
750
850
kHz
Sampling, convertion and setting Rs
≤ 200 K for
ADCTCONV
Conversion time
44
59
68
s
Ch1, Ch2, Ch3; Rs
≤ 500 for Ch6, Ch7, Ch8
REFERENCE VOLTAGES
TA = 25°C, V(ADC_REF)=VINTREF when internal
2.53
VINTREF
Internal ADC reference voltage
2.53
2.54
V
ADC reference is selected
5
Internal reference short circuit
V(ADC_REF)= AGND1, internal reference enabled
ISHRT(INTREF)
6
mA
limit
via I2C
ADC internal reference
ppm/
°
VREF(DRIFT)
50
100
temperature drift
C
ADC Internal reference
Measured at OUT pin (internal reference) or
IQ(ADC)
40
A
quiescent current
ADC_REF pin (external reference)
00
0
ADC channel 2 bias current, set via
01
10
I2C register ADC_WAIT bits
A
ANLG2 pin internal pullup
I(ANLG2)
10
50
(ADC_CH2I_D1_1, ADC_CH2I _D2)
current source
11
60
Total accuracy, relative to selected value
–25%
25%
15
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