參數(shù)資料
型號: TPS65800RTQTG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC56
封裝: 8 X 8 MM, GREEN, PLASTIC, QFN-56
文件頁數(shù): 67/98頁
文件大?。?/td> 2077K
代理商: TPS65800RTQTG4
www.ti.com
ELECTRICAL CHARACTERISTICS – SYSTEM SEQUENCING AND OPERATING MODES
SLVS606C – SEPTEMBER 2005 – REVISED FEBRUARY 2007
Over recommended operating conditions (typical values at T
J = 25°C), application circuit as in Figure 3 (unless otherwise
noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
QUIESCENT CURRENT
BAT pin current, sleep
IBAT(SLEEP)
Input power not detected, V(BAT) = 4.2 V, Sleep mode set
370
mode set
BAT pin current, charge
Charger function enabled by I2C, termination detected, input
IBAT(DONE)
3
terminated
power detected and selected
A
BAT pin current, charge
Charger function disabled by I2C, termination not detected,
IBAT(CHGOFF)
3
function OFF
input power detected and selected
Charger function disabled by I2C, termination not detected,
AC or USB pin current,
IINP(CHGOFF)
input power detected and selected. All integrated supplies
200
charge function OFF
and drivers OFF, no load at OUT pin.
UNDERVOLTAGE LOCKOUT
Internal UVLO detection
NO POWER mode set at V(OUT) < VUVLO,
VUVLO
–3%
2.5
3%
V
threshold
V(OUT) decreasing
UVLO detection
VUVLO_HYS
V(OUT) increasing
120
mV
hysteresis
UVLO detection deglitch
tDGL(UVLO)
Falling voltage only
5
ms
time
SYSTEM LOW VOLTAGE THRESHOLD
Minimum system voltage System voltage V(SYS_IN) decreasing, SLEEP mode set if
VLOW_SYS
0.97
1
1.03
V
detection threshold
V(SYS_IN) < VLOW_SYS
Minimum system voltage
VHYS(LOWSYS)
V(SYS_IN) increasing
50
mV
detection hysteresis
Minimum system voltage
tDGL(LOWSYS)
V(SYS_IN) decreasing
5
ms
detection deglitch time
THERMAL FAULT
TSHUT
Thermal shutdown
Increasing junction temperature
165
°C
Thermal shudown
THYS(SHUT)
Decreasing junction temperature
30
hysteresis
INTEGRATED SUPPLY POWER FAULT DETECTION
Power-good fault
Falling output voltage, applies to all integrated supply
VPGOOD
85%
90%
93%
detection threshold
outputs. Referenced to the programmed output voltage value
Power-good fault
Rising output voltage, applies to all integrated supply outputs.
VHYS(PGOOD)
3%
5%
7%
detection hysteresis
Referenced to VPGOOD threshold
HOT RESET FUNCTION
VHRSTON
Low-level input voltage
RESET mode set at V(HOT_RESET) < VHRSTON
0.4
V
VHRSTOFF
High level input voltage
HOT reset not active at V(HOT_RESET) > VHRSTOFF
1.3
tDGL(HOTRST)
Hot reset input deglitch
5
ms
SYSTEM RESET – OPEN DRAIN OUTPUT RESPWRON
VRSTLO
Low level output voltage
IIL = 10 mA, V(RESPWRON ) < VRSTLO
0
0.3
V
ITRSTPWON
Pullup current source
Internally connected to TRSTPWRON pin
0.9
1.0
1.12
A
KRESET
Reset timer constant
TRESET = KRESET× CTRSTPWON
1
ms/nF
SEQUENCING DELAYS
tDLY(D1)
Sequencing delay
See sequencing timing diagram
0.24
ms
tDLY(D1)
Sequencing delay
See sequencing timing diagram
12
7
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