參數(shù)資料
型號(hào): TPS65800RTQTG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC56
封裝: 8 X 8 MM, GREEN, PLASTIC, QFN-56
文件頁(yè)數(shù): 36/98頁(yè)
文件大?。?/td> 2077K
代理商: TPS65800RTQTG4
www.ti.com
INTERRUPT CONTROLLER – I2C REGISTERS
SLVS606C – SEPTEMBER 2005 – REVISED FEBRUARY 2007
SYSTEM STATUS MONITORED BY INTERRUPT CONTROLLER
B7
B6
B5
B4
B3
B2
B1
B0
CHG_STAT, ADDRESS=A, ALL BITS READ ONLY – POWER UP DEFAULTS SHOW SYSTEM STATUS WHEN EXITING POWER DOWN
Bit name
BAT_STAT(1)
INPUT _PWR
THDPPM_ON
ACPG
USBPG
STAT1
STAT2
INP_OV
Function
BATTERY DISCH
SELECTED
THERMAL
AC INPUT
USB INPUT
CHARGE STATUS
AC OR USB
STATUS
INPUT POWER
FAULT AND
POWER
INPUT OVP
STATUS
DPPM MODE
STATUS
DETECTION
When 0
NOT
AC INPUT
BOTH OFF
AC NOT
USB NOT
00=FAULT/OFF/SUSPEND,
NO OVP
DISCHARGING
SELECTED
DETECTED
01=DONE, 10=FAST CHG ON,
11= PRECHARGE
When 1
When 1
USB INPUT
DPPM ON OR
AC DETECTED
USB
OVP
DISCHARGING
SELECTED
THERMAL ON
DETECTED
ADC STATUS
REGISTER ADC_READING_HI, B7: CONVERSION COMPLETE;
INTERNAL STATUS BITS (NO I2C REGISTER BIT AVAILABLE: INPUT OUT OF RANGE (HI OR LO), ANLG1 PIN IMPEDANCE TO AGND2 EXCEEDS 1
m
OTHER SYSTEM STATUS: THERMAL FAULT DETECTED
(1)
BAT_STAT pin does not generate an interrupt, in order to avoid oscillatory behavior when battery supplement mode is set.
The I2C registers that control an interrupt generation (INT: HI
→LO) are shown below. The HEX address for each
register is shown by the register name, together with the R or W functionality for the register bits. Shaded values
indicate default initial power-up values.
INTERRUPT AND POWER GOOD FAULT MANAGEMENT REGISTERS
B7
B6
B5
B4
B3
B2
B1
B0
INTMASK1, ADDRESS=03, ALL BITS R/W
Bit name
MASK_ISM1
MASK_ISM2
MASK_ISM3
MASK_ILDO1
MASK_ILDO2
MASK_ILDO3
MASK_ILDO4
MASK_ILDO5
Function
MASK INT by
Mask INT by
MASK INT by
SM1 PGOOD
SM2 PGOOD
SM3 PGOOD
LDO1 PGOOD
LDO2 PGOOD
LDO3 PGOOD
LDO4 PGOOD
LDO5 PGOOD
FAULT
When 0
UNMASKED
When 1
MASKED
INTMASK2, ADDRESS=04, ALL BITS R/W
Bit name
MASK_IADC
MASK_IANLG1
MASK_IGPIO2
MASK_IGPIO1
MASK_ITHSH
MASK_ICHGS
MASK_IADC_H
MASK_IADC_L
UT
T
I
O
Function
MASKS INT BY MASKS INT BY MASKS INT BY MASKS INT BY MASKS INT BY
MASK INT BY
ADC END OF
ANLG1 HIGH
GPIO2 EDGE
GPIO1 EDGE
THERMAL
CHG_STAT
ADC INPUT
CONVERSION
IMPEDANCE
TRANSITION
FAULT
REGISTER
ABOVE HI
BELOW LO
BITS
LIMIT
When 0
UNMASKED
When 1
MASKED
INT_ACK1, ADDRESS=05, ALL BITS R/W
Bit name
ACK_SM1
ACK_SM2
ACK_SM3
ACK_LDO1
ACK_LDO2
ACK_LDO3
ACK_LDO4
ACK_LDO5
Function
SM1 INT
SM2 INT
SM3 INT
LDO1 INT
LDO2 INT
LDO3 INT
LDO4 INT
LDO5 INT
REQUEST
When 0
CLEAR FLAG
When 1
SM1 PGOOD
SM2 PGOOD
SM3 OVP
LDO1 PGOOD
LDO2 PGOOD
LDO3 PGOOD
LDO4 PGOOD
LDO5 PGOOD
FAULT
GENERATED
INT
INT_ACK2, ADDRESS=06, ALL BITS READ ONLY
Bit name
ACK_ADC
ACK_ANLG1
ACK_GPIO2
ACK_GPIO1
ACK_THSHUT
ACK_CHGSTA
ACK_ADC_HI
ACK_ADC_LO
T
Function
ADC INT
ANLG1
GPIO2 INT
GPIO1 INT
THERMAL
CHARGER INT
ADC INT
REQUEST 1
COMPARATO
REQUEST
FAULT INT
REQUEST
REQUEST 2
REQUEST 3
R INT
REQUEST
When 0
CLEAR FLAG
41
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