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參數(shù)資料
| 型號： | TMS320VC5409PGE-100 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-Bit Digital Signal Processor |
| 中文描述： | 16位數(shù)字信號處理器 |
| 文件頁數(shù)： | 19/78頁 |
| 文件大小： | 1018K |
| 代理商： | TMS320VC5409PGE-100 |
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TMS320VC5409
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS082C – APRIL 1999 – REVISED MARCH 2000
19
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
16-bit nonmultiplexed mode
In nonmultiplexedmode, a host with separate address/data buses can access the HPI16 data register (HPID)
via the HD 16-bit bidirectional data bus, and the address register (HPIA) via the 16-bit HA address bus, external
address and data pins, A0–A15 and D0–D15, respectively. The host initiates an access with the strobe signals
(HDS1, HDS2, HCS) and controls the direction of the access with the HR/W signal. The HPI16 can stall host
accesses via the HRDY signal. Note that the HPIC register is not available in nonmultiplexedmode since there
are no HCNTL signals available. All host accesses initiate a DMA read or write access. The HPI16
nonmultiplexed mode does not support host-to-DSP and DSP-to-host interrupts. When the HPI is disabled or
in HPI16 mode, HD0–HD7 can be configured as general-purpose input/output (GPIO). The HPI16 pin is
sampled at RESET. The HPI16 pin should never be changed while the device RESET is HIGH.
host bus holder configuration
The ’5409 has two bus holder control bits, BH (BSCR[1]) and HBH (BSCR[2]), to control the bus keepers of the
address bus (A[15–0]), data bus (D[15–0]) and the HPI data bus (HD[7–0]). The bus keeper enabling/disabling
is described in Table 5.
Table 5. Bus Holder Control Bits
HPI16 pin
BH
HBH
D[15–0]
A[15–0]
HD[7–0]
0
0
0
OFF
OFF
OFF
0
0
1
OFF
OFF
ON
0
1
0
ON
OFF
OFF
0
1
1
ON
OFF
ON
1
0
0
OFF
OFF
ON
1
0
1
OFF
ON
ON
1
1
0
ON
OFF
ON
1
1
1
ON
ON
ON
The HPI bus holders are activated via the HBH bit in the Bank Switch Control Register (BSCR). The HBH bit
can control bus holder behavior for both the 8-bit and 16-bit modes. In the 8-bit mode, the HBH bit controls the
bus holders on the host data pins HD7–HD0. When HBH = 1, the host data bus holders are active. When HBH
= 0 the host data bus holders are inactive. In the 16-bit nonmultiplexed mode, the bus holders for pins HD7–HD0
are always active; however, the HBH bit controls the host address pins A15–A0. When HBH = 1, the host
address bus holders are active. When HBH = 0, the host address bus holders are inactive.
operation during IDLE2
The HPI can continue to operate during IDLE1 or IDLE2 by using special clock management logic that turns
on relevant clocks to perform a synchronous memory access, and then turns the clocks back off to save power.
The DSP CPU does not wake up from the IDLE mode during this process.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320VC5409PGE100 | 制造商:Texas Instruments 功能描述:Digital Signal Processor IC |
| TMS320VC5409PGE-80 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320VC5409ZGU100 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320VC5409ZGU-80 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320VC5410AGGU1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
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