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參數(shù)資料
| 型號： | THS8083T |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Triple 8-Bit, 80 MSPS, 3.3-V Video and Graphics Digitizer With Digital PLL |
| 中文描述： | 三8位，80 MSPS的，在3.3 V視頻和圖形數(shù)字轉換器與數(shù)字鎖相環(huán) |
| 文件頁數(shù)： | 55/61頁 |
| 文件大小： | 278K |
| 代理商： | THS8083T |
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6
–
1
6 Application Information
6.1
Designing With PowerPAD
The THS8083 is housed in a high-performance, thermally enhanced, 100-pin PowerPAD package (TI package
designator: 100PZP). Use of the PowerPAD package does not require any special considerations except to note that
the PowerPAD, which is an exposed die pad on the bottom of the device, is a metallic thermal and electrical conductor.
Therefore, if not implementing the PowerPAD
PCB features, the use of solder masks (or other assembly
techniques) may be required to prevent any inadvertent shorting by the exposed PowerPAD of connection etches
or vias under the package. The recommended option, however, is not to run any etches or signal vias under the
device, but to have only a grounded thermal land as explained below. Although the actual size of the exposed die
pad may vary, the minimum size required for the keepout area for the 100-pin PZP PowerPAD
package is
5 mm
×
5 mm.
It is recommended that there be a thermal land, which is an area of solder-tinned-copper, underneath the PowerPAD
package. The thermal land will vary in size, depending on the PowerPAD package being used, the PCB construction,
and the amount of heat that needs to be removed. In addition, the thermal land may or may not contain numerous
thermal vias depending on PCB construction.
More information on this package and other requirements for using thermal lands and thermal vias are detailed in
the TI application note
PowerPAD
Thermally Enhanced Package Application Report
, TI literature number
SLMA002, available via the TI Web pages beginning at URL: http://www.ti.com
For the THS8083, this thermal land should be grounded to the low impedance ground plane of the device. This
improves not only thermal performance but also the electrical grounding of the device. It is also recommended that
the device ground terminal landing pads be connected directly to the grounded thermal land. The land size should
be as large as possible without shorting device signal terminals. The thermal land may be soldered to the exposed
PowerPAD using standard reflow soldering techniques.
While the thermal land may be electrically floated and configured to remove heat to an external heat sink, it is
recommended that the thermal land be connected to the low impedance ground plane for the device.
Table 6-1 lists a comparison for thermal resistances between the PowerPAD package (100PZP) used for this device
and a regular 100-pin TQFP package.
Table 6
–
1. Junction-Ambient and Junction-Case Thermal Resistances
vs
100 PZP PowerPAD
100 PIN REGULAR TQFP
AIRFLOW IN lfm
0
150
250
500
θ
JA (
°
C/W) 100 PZP
θ
JC (
°
C/W) 100 PZP
θ
JA (
°
C/W) 100 pin regular
θ
JC (
°
C/W) 100 pin regular
17.3
11.8
10.4
9.0
0.12
49
3
PowerPAD is a trademark of Texas Instruments.
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