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參數(shù)資料
| 型號(hào)： | THS8083T |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Triple 8-Bit, 80 MSPS, 3.3-V Video and Graphics Digitizer With Digital PLL |
| 中文描述： | 三8位，80 MSPS的，在3.3 V視頻和圖形數(shù)字轉(zhuǎn)換器與數(shù)字鎖相環(huán) |
| 文件頁(yè)數(shù)： | 37/61頁(yè) |
| 文件大?。?/td> | 278K |
| 代理商： | THS8083T |
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3
–
13
3.2.32 Register Name: CH1_CLP
Subaddress: 25 (R/W)
CH1_CLP7
MSB
LSB
CH1_CLP6
CH1_CLP5
CH1_CLP4
CH1_CLP3
CH1_CLP2
CH1_CLP1
CH1_CLP0
CH1_CLP[7..0]
Programmable clamp value for Channel 1
Default: 0x80 = 128 (mid-range)
3.2.33 Register Name: CH1_COARSE
Subaddress: 26 (R/W)
X
MSB
LSB
X
CH1_COARSE5 CH1_COARSE4 CH1_COARSE3 CH1_COARSE2 CH1_COARSE1 CH1_COARSE0
CH1_COARSE[5..0]
Coarse PGA value for Channel 1
Default: 0x20 = 32 (mid-range)
3.2.34 Register Name: CH1_FINE
Subaddress: 27 (R/W)
X
MSB
LSB
X
X
CH1_FINE4
CH1_FINE3
CH1_FINE2
CH1_FINE1
CH1_FINE0
CH1_FINE[4..0]
Fine PGA value for Channel 1
Default: 0x10 = 16 (mid-range)
3.2.35 Register Name: CH2_CLP
Subaddress: 28 (R/W)
CH2_CLP7
MSB
LSB
CH2_CLP6
CH2_CLP5
CH2_CLP4
CH2_CLP3
CH2_CLP2
CH2_CLP1
CH2_CLP0
CH2_CLP[7..0]
Programmable clamp value for Channel 2
Default: 0x80 = 128 (mid-range)
3.2.36 Register Name: CH2_COARSE
Subaddress: 29 (R/W)
X
MSB
LSB
X
CH2_COARSE5 CH2_COARSE4 CH2_COARSE3 CH2_COARSE2 CH2_COARSE1 CH2_COARSE0
CH2_COARSE[5..0]
Coarse PGA value for Channel 2
Default: 0x20 = 32 (mid-range)
3.2.37 Register Name: CH2_FINE
Subaddress: 2A (R/W)
X
MSB
LSB
X
X
CH2_FINE4
CH2_FINE3
CH2_FINE2
CH2_FINE1
CH2_FINE0
CH2_FINE[4..0]
Fine PGA value for Channel 2
Default: 0x10 = 16 (mid-range)
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