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參數(shù)資料
| 型號： | T7698 |
| 廠商： | Lineage Power |
| 英文描述： | Quad T1/E1 Line Interface and Octal T1/E1 Monitor(四T1/E1線接口和八T1/E1監(jiān)控器) |
| 中文描述： | 四T1/E1線路接口和八路的T1/E1監(jiān)視器（四個T1/E1線接口和八T1/E1的監(jiān)控器） |
| 文件頁數(shù)： | 55/112頁 |
| 文件大?。?/td> | 1359K |
| 代理商： | T7698 |
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Data Sheet
January 1999
T7698 Quad T1/E1 Line Interface and Octal T1/E1 Monitor
55
Lucent Technologies Inc.
Frame Monitors
(continued)
Frame Formats
(continued)
T1 Loss of Frame Alignment (LFA)
Loss of frame alignment condition is caused by the inability of the frame monitor to maintain the proper sequence
of frame bits. The number of errored framing bits required to detect a loss of frame alignment for the T1 framing for-
mats is given is Table 33. In the case of ESF, excessive CRC-6 errors can also result in LFA by optionally setting
register Framer_PR14, bit 0 = 0 (default mode).
The T7698 indicates the loss of frame and superframe conditions by setting the loss of frame alignment (LFA) and
loss of superframe alignment (LSFA) bits, respectively, in the status register Framer_SR1. LFA state can be forced
on demand by setting the register Framer_PR2, bit 5 = 1.
Table 33. T1 Loss of Frame Alignment Criteria
Format
Loss of Frame Alignment Condition
D4
2 errored frame bits (F
T
) out of 4 consecutive frame bits force loss of frame and superframe
alignment.
2 errored frame bits (F
T
) out of 4 consecutive frame bits force loss of frame and superframe
alignment.
3 errored frame bits (F
T
or F
S
or channel 24 FAS pattern) out of 12 consecutive frame bits
force loss of frame alignment.
Due to framing errors: 2 errored FE bits out of 4 consecutive FE bits.
SLC-96
DDS
ESF
Due to CRC-6 errors (if enabled by setting register Framer_PR14, bit 0 = 0 (default mode)):
Option a: Setting Framer_PR14, bit 1 = 0, forces LFA if 32 CRC-6 errors out of 33 CRC-6
checks are detected.
Option b: Setting Framer_PR14, bit 1 = 1, forces LFA if more than 320 CRC-6 errors in
one second are detected.
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