參數(shù)資料
型號(hào): STR912FAW32H6T
廠商: 意法半導(dǎo)體
英文描述: ARM966E-S⑩ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA
中文描述: ARM966E -虜⑩16/32位閃存微控制器與以太網(wǎng),USB,加拿大,交流電機(jī)控制,4個(gè)定時(shí)器,模數(shù)轉(zhuǎn)換器,RTC和DMA的
文件頁(yè)數(shù): 44/99頁(yè)
文件大?。?/td> 979K
代理商: STR912FAW32H6T
Pin description
STR91xFAx32 STR91xFAx42 STR91xFAx44
44/99
5.1
LFBGA144 ball connections
In
Table 8
balls labelled NC are no connect balls. These NC balls are reserved for
future devices and should NOT be connected to ground or any other signal. There are
total of 9 NC (no connection) balls.
Balls H1 and G4 are assigned as EMI bus write signals (EMI_BWR_WRLn and
EMI_WRHn). These two balls can also be configured by the user as EMI low or high
byte select signals (EMI_LBn and EMI_UBn).
The PLLGND (B8) and PLLVDDQ (C9) balls can be connected to VSSQ and VDDQ.
STR91x LFBGA144 Ball Connections
Table 8.
A
B
C
D
E
F
G
H
J
K
L
M
1
P4.2
P7.2
NC
P7.0
VDDQ
P7.3
P7.4
EMI_WR
Hn
(EMI_UB
n)
VDDQ
PHYCLK
_P5.2
P8.0
P2.2
2
AVREF
P4.1
P4.0
P7.1
P2.0
NC
P6.2
P5.3
P8.2
P8.3
VSSQ
P8.6
3
AVDD
P4.3
AVSS
NC
P2.1
VSS
P6.3
P8.1
P6.1
P2.3
P8.4
VBATT
4
P4.6
P4.5
P4.4
VSSQ
P5.0
VDD
EMI_BWR
_WRLn
(EMI_LBn)
P6.0
P8.5
VSSQ
P2.4
X2_RTC
5
P7.7
VDDQ
VSSQ
P4.7
P7.5
NC
VSSQ
VSS
P2.5
P8.7
VDDQ
X1_RTC
6
JTMS
JTDO
JTDI
P1.7
P7.6
P5.1
P2.6
P9.4
P9.3
P9.2
VDD
P9.0
7
P1.5
P1.4
NC
VDD
VSS
P1.6
P6.5
VDDQ
VSSQ
P3.0
USBCLK
_P2.7
P9.1
8
VSSQ
PLLVSS
Q
P1.3
JRSTn
JTCK
VSSQ
P6.4
EMI_BAA
n
P3.3
EMI_WAI
Tn
P9.5
EMI_BCL
K
9
RESET_
OUTn
P1.2
PLLVDDQ
VDDQ
P6.6
VDDQ
NC
P5.6
EMI_RDn
P9.7
P3.4
P9.6
10
X1_CPU
P1.0
P1.1
USBDN
TAMPER
_ IN
NC
VSS
P0.4
EMI_ALE
P0.1
P3.5
P3.1
11
X2_CPU
JRTCK
USBDP
(2)
MII_MDI
O
(3)
P0.6
P0.5
VDD
P5.5
P0.2
P3.7
P0.0
P3.2
12
EMI_WE
n
P0.7
RESET_I
Nn
P6.7
NC
NC
P5.7
P0.3
P5.4
VDDQ
VSSQ
P3.6
1.
No PHYCLK function on STR910F
A
W devices.
2.
No USBCLK function on STR910F
A
W devices.
3.
NU (Not Used) on STR910FAW devices. D10 is not connected, C11 must be pulled up by a 1.5 kOhm resistor to VDDQ.
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