
B-24
DSP56853/854/855/857/858 User’s Manual
MOTOROLA
Preliminary
Application:
Date:
Programmer:
Sheet
C
B
4 of 4
OCCS
CGM Time of Day Register (CGMTOD)
CGM Time of Day
Register (CGMTOD)
$1FFFF10 + $2
Bits
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
TOD
Write
RESET
00
00000
0000
00000
Bits
Name
Description
11 - 0
TOD
Time of Day
The output of the oscillator is divided by (TOD + 1) and then divided by 2 to generate the TOD clock
used by the COP module when TOD_SEL is high. The value of TOD should be chosen to result in
a TOD clock frequency in the range of 15.12KHz to 31.25KHz. This register is only reset during
Power-On Reset (POR).
denotes Reserved Bits