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DSP56853/854/855/857/858 User’s Manual
MOTOROLA
Preliminary
DSP5685x Family Description
1
With the exception of the DSP56852 chip (not included in this manual), the DSP5685x
family includes from 12K to 40K words of Program SRAM, 4K to 24K words of Data
RAM and 1K of Boot ROM.
With the exception of the DSP56857, the balance of the DSP5685x family of devices
supports program execution from either internal or external memories. Two data operands
can be accessed from the on-chip Data RAM per instruction cycle. The DSP5685x family
also provides two external dedicated interrupt lines, and up to 47-General Purpose
Input/Output (GPIO) lines, depending on peripheral configuration.
All devices, except the 857, support program execution from external memory. The
DSP56800E core can access two data operands from the on-chip Data RAM per
instruction cycle.
These DSP controllers also provides a full set of standard programmable peripherals that
include an 8-bit Host Interface (HI8), up to two Enhanced Synchronous Serial Interfaces
(ESSI), one Serial Peripheral Interface (SPI), two Serial Communications Interfaces
(SCI), and one Quad Timer (TMR). When primary functions of each of the peripheries
(HI8, TMR, ESSI, SPI, SCI I/O and four chip selects) are not required, they can be used as
General Purpose Input/Outputs (GPIOs). Please see Section 1.3 for details on each of the
DSP5685x family of devices.
1.2.1 DSP5685x Key Family Features
1.2.1.1 The DSP56853 Chip
Supports program execution from either internal or external memories
Provides two external dedicated interrupt lines
Provides up to 41-General Purpose Input/Output (GPIO) lines, depending on
peripheral configuration
Includes 12K words of Program RAM
Includes 4K words of Data RAM
Includes 1K words of Boot ROM
Provides a full set of standard programmable peripherals including:
— eight-bit Host Interface (HI8)
— one Enhanced Synchronous Serial Interface (ESSI)
— one Serial Peripheral Interface (SPI)
— two Serial Communications Interfaces (SCIs)
— one Quad Timer (TMR)
— one, 6-channel Direct Memory Access (DMA)