參數(shù)資料
型號(hào)： SiI3531ACNU
廠(chǎng)商： Silicon Image, Inc.
英文描述： PCI Express to Serial ATA Controller
中文描述： PCI Express到串行ATA控制器
文件頁(yè)數(shù)： 8/81頁(yè)
文件大?。?/td> 553K
代理商： SII3531ACNU
PCI Express to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
8
1 Overview
The Silicon Image SiI3531A is a PCI Express to single port Serial ATA controller. The SiI3531A is designed to provide serial
ATA connectivity with minimal host overhead and host to device latency.
The SiI3531A supports a 1-lane 2.5 Gb/s PCI
Express bus and the Serial ATA Generation 2 transfer rate of 3.0 Gb/s (300 MB/s).
1.1 Features
1.1.1 Overall Features
Host Protocol
o
Optimized for transaction oriented designs – minimal Host overhead
o
Supports two command issuance mechanisms
Efficient in both embedded and PC implementations
Reduces dependency on bridge behavior
Fabricated in a 0.18
μ
CMOS process with a 1.8 volt core and 3.3 volt I/Os
Available in a 48-pin QFN package (7x7 mm, 0.4 mm lead pitch).
EPAD must be soldered to PCB GND.
1.1.2 PCI Express Features
Supports 1-lane 2.5 Gb/s PCI Express
All registers appear in unified memory space
All registers accessible through I/O space
Full-chip command completion status accessible with single PCI Express access
1.1.3 Serial ATA Features
Integrated Serial ATA Link and PHY logic
Compliant with Serial ATA 1.0 specifications
Supports Serial ATA Generation 2 transfer rate of 3.0 Gb/s
Output Swing Control
Supports Native Queuing
Supports First Party DMA
Supports Port Multipliers
31 Commands and Scatter/Gather Tables on-chip
Protocol Override per Command
1.2 References
Serial ATA / High Speed AT Attachment specification, Revision 1.0a
Serial ATA II: Extensions to Serial ATA 1.0a, Revision 1.2
Serial ATA II: Port Multiplier, Revision 1.1 and Revision 1.2
Serial ATA II: Electrical Specification, Revision 1.0
Serial ATA II: Cables and Connectors, Volumes 1 and 2
PCI Express Base Specification Revision 1.0a
PCI Express Card Electromechanical Specification Revision 1.1
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