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參數(shù)資料
| 型號： | SiI3531ACNU |
| 廠商： | Silicon Image, Inc. |
| 英文描述： | PCI Express to Serial ATA Controller |
| 中文描述： | PCI Express到串行ATA控制器 |
| 文件頁數(shù)： | 62/81頁 |
| 文件大小： | 553K |
| 代理商： | SII3531ACNU |
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PCI Express to Serial ATA Controller
Data Sheet
6.3.1 Port LRAM
Address Offset: 000
H
-FFF
H
Access Type: Read/Write
Reset Value: indeterminate
The Port LRAM consists of 31 Slots of 128 bytes each and a 32
nd
“Slot” used to hold 16 Port Multiplier Device Specific
Registers.
Address Offset
Description
000
H
-07F
H
Slot 0
080
H
-0FF
H
Slot 1
100
H
-17F
H
Slot 2
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
62
180
H
-EFF
H
Slots 3-29
F00
H
-F7F
H
F80
H
-F83
H
F84
H
-F87
H
F88
H
-F8B
H
F8C
H
-F8F
H
Slot 30
Port Multiplier Device 0 Status Register
Port Multiplier Device 0 QActive Register
Port Multiplier Device 1 Status Register
Port Multiplier Device 1 QActive Register
F90
H
-FF7
H
Port Multiplier Device Registers for Devices 2-14
FF8
H
-FFB
H
FFC
H
-FFF
H
Port Multiplier Device 15 Status Register
Port Multiplier Device 15 QActive Register
Table 6-4 Port LRAM layout
Address Offset
000
H
-01F
H
020
H
-02F
H
030
H
-03F
H
040
H
-047
H
040
H
-07F
H
1C00
H
-1C07
H
Description
Current FIS and Control
Scatter/Gather Entry 0 or ATAPI command packet
Scatter/Gather Entry 1
Command Activation Register (Actual)
Scatter/Gather Table
Command Activation Register (Shadow)
Port Request
Block (PRB)
Table 6-5 Port LRAM Slot layout
A Port LRAM Slot is 128 bytes used to define Serial-ATA commands. The addresses shown above are for slot 0.
6.3.1.1 Command Activation Register
The Command Activation Register is written using a shadow address. The Command Execution State Machine overwrites it
when the Scatter/Gather Table is fetched. The translation of the shadow address to the actual LRAM address is shown here:
Address bit
12
11
Shadow Activation Register Address
1
1
Actual Activation Register LRAM Address
0
10
1
Slot Number
9
0
8
0
7
6
Slot Number
1
0
5
4
3
210
000
000
0
0
Table 6-6 Command Activation Register Address Translation
6.3.1.2 Port Multiplier Device Specific Registers
The Port Multiplier Device Specific Registers are 16 registers that contain the SActive register and the Diagnostic register for
each of the 16 devices that may be connected to a Port Multiplier. Besides being directly addressable in the LRAM address
space, the currently selected Port Multiplier Port SActive register may be indirectly addressed at offset 1F0C
H
. The LRAM
address for this indirect (read-only) access is derived as shown here:
Address bit
12
11
SActive Indirect Register Address
1
1
Actual LRAM Address
0
1
10
1
1
9
1
1
8
1
1
7
0
1
6
0
5
0
4
0
3
1
210
100
000
PMP (in SControl)
Table 6-7 SActive Indirect Address Translation
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