參數(shù)資料
型號： SiI3531ACNU
廠商： Silicon Image, Inc.
英文描述： PCI Express to Serial ATA Controller
中文描述： PCI Express到串行ATA控制器
文件頁數(shù)： 3/81頁
文件大?。?/td> 553K
代理商： SII3531ACNU
PCI Express to Serial ATA Controller
Table of Contents
Silicon Image, Inc.
Data Sheet
2006 Silicon Image, Inc.
SiI-DS-0208-C
3
1
Overview ...........................................................................................................................................8
1.1
Features ..................................................................................................................................................... 8
1.1.1
1.1.2
1.1.3
1.2
References................................................................................................................................................. 8
Electrical Characteristics ................................................................................................................9
2.1
Device Electrical Characteristics ............................................................................................................ 9
2.2
SATA Interface Timing Specifications.................................................................................................. 11
2.3
SATA Interface Transmitter Output Jitter Characteristics.................................................................. 11
2.4
PCI Express Interface Timing Specifications....................................................................................... 12
2.5
PCI Express Interface Transmitter Output Jitter Characteristics ...................................................... 12
2.6
XTALI Requirements............................................................................................................................... 12
2.7
Power Supply Noise Requirements ...................................................................................................... 13
Pin Definition..................................................................................................................................14
3.1
SiI3531A Pin Listing................................................................................................................................ 14
3.2
SiI3531A Pin Diagrams........................................................................................................................... 15
3.3
SiI3531A Pin Descriptions...................................................................................................................... 15
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
Package Drawing............................................................................................................................18
Programming Model.......................................................................................................................20
5.1
SiI3531A Block Diagram......................................................................................................................... 20
5.2
SiI3531A S-ATA Port Block Diagram..................................................................................................... 21
5.3
Data Structures ....................................................................................................................................... 22
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.3.10
5.3.11
5.4
Operation ................................................................................................................................................. 34
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
5.4.8
5.4.9
5.4.10
5.4.11
5.4.12
5.4.13
Register Definitions .......................................................................................................................43
Overall Features...................................................................................................................................................8
PCI Express Features ..........................................................................................................................................8
Serial ATA Features.............................................................................................................................................8
2
3
PCI Express Pins ...............................................................................................................................................15
LED / Hot Plug pins............................................................................................................................................16
Serial ATA Signals..............................................................................................................................................16
NC Pins..............................................................................................................................................................16
Power/Ground Pins ............................................................................................................................................17
4
5
The Command Slot.............................................................................................................................................22
The Scatter/Gather Entry (SGE).........................................................................................................................23
The Scatter/Gather Table (SGT) ........................................................................................................................24
The Port Request Block (PRB)...........................................................................................................................24
The PRB Control Field........................................................................................................................................26
The PRB Protocol Override Field .......................................................................................................................27
Standard ATA Command PRB Structure............................................................................................................28
PACKET Command PRB Structure....................................................................................................................30
Soft Reset PRB Structure...................................................................................................................................31
External Command PRB Structure.....................................................................................................................32
Interlocked Receive PRB Structure....................................................................................................................33
Command Issuance............................................................................................................................................34
Reset and Initialization .......................................................................................................................................34
Port Ready .........................................................................................................................................................35
Port Reset Operation..........................................................................................................................................35
Initialization Sequence........................................................................................................................................35
Interrupts and Command Completion.................................................................................................................36
Interrupt Sources................................................................................................................................................36
Command Completion – The Slot Status Register.............................................................................................39
The Attention Bit.................................................................................................................................................40
Interrupt Service Procedure................................................................................................................................40
Interrupt No Clear on Read ................................................................................................................................40
Error Processing.................................................................................................................................................40
Error recovery procedures..................................................................................................................................41
6
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