參數(shù)資料
型號: SI3230PPQX-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 7/108頁
文件大?。?/td> 0K
描述: BOARD EVAL W/DISCRETE INTERFACE
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3230
已供物品: 板,CD
Si3230
104
Preliminary Rev. 0.96
Not
Recommended
fo
r N
ew
D
esi
gn
s
8. Package Outline: 38-Pin QFN
Figure 20 illustrates the package details for the Si3230. Table 41 lists the values for the dimensions shown in the
illustration.
Figure 20. 38-Pin Quad Flat No-Lead Package (QFN)
Table 41. Package Diagram Dimensions1,2,3
Symbol
Millimeters
Min
Nom
Max
A
0.75
0.85
0.95
A1
0.00
0.01
0.05
b
0.18
0.23
0.30
D5.00 BSC.
D2
3.10
3.20
3.30
e0.50 BSC.
E7.00 BSC.
E2
5.10
5.20
5.30
L
0.35
0.45
0.55
L1
0.03
0.05
0.08
aaa
0.10
bbb
0.10
ccc
0.08
ddd
0.10
Notes:
1.
Dimensioning and tolerancing per ANSI Y14.5M-1994.
2.
The drawing conforms to the JEDEC Solid State Outline
MO-220, Variation VHKD-1.
3.
Recommended card reflow profile is per the JEDEC/IPC
J-STD-020C specification for Small Body Components.
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