參數(shù)資料
型號： SI3230PPQX-EVB
廠商： Silicon Laboratories Inc
文件頁數(shù)： 13/108頁
文件大?。?/td> 0K
描述： BOARD EVAL W/DISCRETE INTERFACE
標準包裝： 1
系列： ProSLIC®
主要目的： 接口，模擬前端（AFE）
已用 IC / 零件： Si3230
已供物品： 板，CD
Si3230
12
Preliminary Rev. 0.96
Not
Recommended
fo
r N
ew
D
esi
gn
s
Figure 3. Si3230/Si3230M Application Circuit Using Si3201
Table 11. Si3230/Si3230M + Si3201 External Component Values
Component (s)
Value
Supplier
C1,C2
10 F, 6 V Ceramic or 16 V Low Leakage Electrolytic, ±20%
Murata, Nichicon URL1C100MD
C3,C4
220 nF, 100 V, X7R, ±20%
Murata, Johanson, Novacap, Venkel
C5,C6
22 nF, 100 V, X7R, ±20%
Murata, Johanson, Novacap, Venkel
C15,C16,C17,C24
0.1 F, 6 V, Y5V, ±20%
Murata, Johanson, Novacap, Venkel
C18,C19
4.7 F, Cer. 6 V, X7R, ±20%
Murata, Johanson, Novacap, Venkel
C26
0.1 F, 100 V, X7R, ±20%
Murata, Johanson, Novacap, Venkel
C30
10 F, 6 V, Electrolytic, ±20%
Panasonic
R1,R3,R5
200 k
, 1/10 W, ±1%
R2,R4
196 k
, 1/10 W, ±1%
R6,R7
4.02 k
, 1/10 W, ±1%
R8,R9
470
, 1/10 W, ±1%
R14,R26*
40.2 k
, 1/10 W, ±1%
R15
243
, 1/10 W, ±1%
R21
15
, 1/4 W, ±5%
R28,R29
1/10 W, 1% (See AN45 or Table 16 for value selection)
R32*
10 k
, 1/10 W, ±5%
Q9
60 V, General Purpose Switching NPN
ON Semi MMBT2222ALT1; Central
Semi CMPT2222A; Zetex FMMT2222
*Note: Only one component per system needed.
Si3201
Si
32
30
/Si
3
23
0M
C2
10uF
C1
10uF
R14
40.2k
C5
22nF
C6
22nF
ITIPN
IRINGN
ITIPP
IRINGP
STIPE
SRINGE
ITIPN
IRINGN
ITIPP
IRINGP
STIPE
SRINGE
TIP
RING
GND
V
BAT
TIP
RING
VD
DD
VDD
A
1
GN
DD
GNDA
IREF
CAPP
CAPM
QGND
SCLK
SDI
SDO
CS
SPI Bus
VDD
A
2
INT
RESET
R5
200k
R281
R21
15
VDD
Pr
ot
ec
ti
o
n
C
ir
cu
it
C24
0.1uF
C19
4.7F
R6
4.02k
R7
4.02k
VBATH
SVBAT
29
25
28
26
17
19
18
1
3
4
5
15
13
16
14
11
10
8
7
31
23
10
27
30
TEST
32
38
37
36
1
2
7
11
12
14
13
Q9
2N2222
C26
0.1uF
R291
VCC
SD
CL
S
DCH
DC-DC Converter
Circuit
D
C
DRV
DCFF
VDC
VBAT
VDC
SD
C
L
SDCH
DC
D
R
V
DCF
F
STIPDC
STIPAC
R26 2
40.2k
GND
R322
10k
VCC
Note 2
Note 1
9
8
34
33
C18
4.7F
VDDA1
C30
10uF
VDDA2
VDDD
C16
0.1uF
C15
0.1uF
C17
0.1uF
R1
200k
15
20
C3
220nF
R8
470
R3
200k
21
16
C4
220nF
R9
470
SRINGAC
SRINGDC
Notes:
1. Values and configurations for these
components can be derived from Table
16 or from App Note 45.
2. Only one component per system
needed.
3. All circuit ground should have a single -
point connection to the ground plane .
R2
196k
R4
196k
T
EST2
4
FSYNC
PCLK
Clock
Inputs
6
3
To
c
o
d
e
c
To
co
dec
IGMP
IGMN
24
22
To codec
4.7F
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