參數(shù)資料
型號(hào)： SC28L202
廠商： NXP Semiconductors N.V.
英文描述： Dual universal asynchronous receiver/transmitter DUART
中文描述： 雙路通用異步接收器/發(fā)送器杜阿爾特
文件頁數(shù)： 44/77頁
文件大?。?/td> 531K
代理商： SC28L202
Philips Semiconductors
Objective specification
SC28L202
Dual UART
2000 Feb 10
38
BCRx – Bidding Control Register – Xon/Xoff, A and B
Bits 7:0
MSBs of an Xon/Xoff interrupt bid
This register provides the 8 MSBs of the Interrupt Arbitration number for a Xon/Xoff interrupt.
BCRA – Bidding Control Register – Address, A and B
Bits 7:0
MSBs of an address recognition event interrupt bid
This register provides the 8 MSBs of the Interrupt Arbitration number for an address recognition event interrupt.
BCR C/T – Bidding Control Register –C/T, 0 and 1
Bits 7:0
MSBs of a counter/timer event interrupt bid
This register provides the 8 MSBs of the Interrupt Arbitration number for a counter/timer event interrupt.
BCRLBE – Bidding Control Register – Received Loop Back Error
Bits 7:0
MSBs of a received loop back error event interrupt bid
This register provides the 8 MSBs of the Interrupt Arbitration number for the received loop back error interrupt.
Registers of the I/O ports
IPCRL – Input Port Change Register Lower Nibble, A and B (n = A for A, n = B for B)
Bit 7
Bit 6
Bit 7
I/O3 n
change
change
change
0 = no change
1 = change
1 = change
1 = change
Bit 6
I/O0 n
change
0 = no change
1 = change
Bit 3
I/O3 n state
Bit 2
I/O2 n state
Bit 1
I/O1 n state
Bit 0
I/O0 n
state
I/O2 n
I/O1 n
0 = no change
0 = no change
Reads the actual logic level at the pin.
1 = high level; 0 = low level
This register may be read to determine the current logical level of the I/O pins and examine the output of the change detectors assigned to each
pin. If the change detection is not enabled or if the pin is configured as an output, the associated change field will read b’0.
IPCRU – Input Port Change Register Upper Nibble, A and B (n = A for A, n = B for B)
Bit 7
Bit 6
Bit 7
I/O7 n change
I/O6 n change
I/O5 n change
0 = no change
1 = change
1 = change
1 = change
Bit 6
I/O4 n change
0 = no change
1 = change
Bit 3
I/O7 n state
Reads the actual logic level at the pin.
1 = high level; 0 = low level
Bit 2
I/0n6 state
Bit 1
I/O5 n state
Bit 0
I/O4 n state
0 = no change
0 = no change
This register may be read to determine the current logical level of the I/O pins and examine the output of the change detectors assigned to each
pin. If the change detection is not enabled or if the pin is configured as an output, the associated change field will read b’0.
IPR – Input Port Register, A and B (n = A for A, n = B for B)
Bits 7:0
Logical levels of I/O(7:0)n
IPCE – Input Change Detect Enable, A and B (n = A for A, n = B for B)
Bit 7
Bit 6
Bit 5
I/O7 n enable
I/O6 n enable
I/O5 n enable
0 = disable
1 = enable
1 = enable
1 = enable
Bit 4
I/O4 n enable
0 = disable
1 = enable
Bit 3
I/O3 n enable
0 = disable
1 = enable
Bit 2
I/O2 n enable
0 = disable
1 = enable
Bit 1
I/O1 n enable
0 = disable
1 = enable
Bit 0
I/O0 n enable
0 = disable
1 = enable
0 = disable
0 = disable
IPCE[7:0] bits activate the input change of state detectors. If a pin is configured as an output, the change of state detectors, if enabled, continue
to be active and will show a change of state as the I/P port changes.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC28L202A1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual universal asynchronous receiver/transmitter DUART
SC28L202A1B 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual universal asynchronous receiver/transmitter DUART
SC28L202A1D 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual universal asynchronous receiver/transmitter DUART
SC28L202A1DGG 功能描述:UART 接口集成電路 3-5V 2CH UART 3MBPS 256B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC28L202A1DGG,112 功能描述:UART 接口集成電路 3-5V 2CH UART 3MBPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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