參數(shù)資料
型號： SAF82525
廠商： INFINEON TECHNOLOGIES AG
英文描述： Data Communications ICs
中文描述： 數(shù)據(jù)通信集成電路
文件頁數(shù)： 74/126頁
文件大?。?/td> 730K
代理商： SAF82525
Semiconductor Group
74
SAB 82525
SAB 82526
SAF 82525
SAF 82526
The activities during frame transmission (supposed two frames, 18 bytes and 52 bytes) is
shown in
figure 35.
Figure 35
Continuous Frames Transmission Sequence Example
Serial
Interface
HSCX
CPU
Interface
ITD00249
18
WR
Bytes
XTF
18
. . .
XME
. . .
32 Bytes
WR
XTF
WR
Bytes
20
. . .
XTF
XPR
XTF + XME
XPR
ITF
Bytes
32
Frame 1
Bytes
Frame 2
Bytes
20
ITF
XPR
XPR
DMA Mode
Prior to the data transmission, the length of the next frame to be transmitted must be
programmed via the Transmit Byte Count Registers (XBCH, XBCL). The resulting byte count
equals the programmed value plus one byte, i.e. since 12 bits are provided via XBCH, XBCL
(XBC11. . .XBC0) a frame length of 1 up to 4096 bytes (4 Kbytes) can be selected.
After this, data transmission can be initiated by command (XTF or XIF). The HSCX will then
autonomously request the correct amount of write bus cycles by activating the DRQT line.
Depending on the programmed frame length, block data transfers of
n
×
32-bytes + remainder (n = 0, 1,…128)
are requested everytime a 32-byte FIFO half (transmit pool) is empty and accessible to the
DMA controller.
相關PDF資料
PDF描述
SAB82525N Data Communications ICs
SAB82526 Data Communications ICs
SAB82526N Data Communications ICs
SAF82525N Data Communications ICs
SAF82526 Data Communications ICs
相關代理商/技術參數(shù)
參數(shù)描述
SAF82525HV2.2 制造商:Lantiq 功能描述:
SAF82525HV22XP 制造商:Lantiq 功能描述:HSCX
SAF82525HV22XT 制造商:Lantiq 功能描述:HSCX
SAF82525N 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Data Communications ICs
SAF82525NV2.1 制造商:Infineon Technologies AG 功能描述:
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