參數(shù)資料
型號： SAF82525
廠商： INFINEON TECHNOLOGIES AG
英文描述： Data Communications ICs
中文描述： 數(shù)據(jù)通信集成電路
文件頁數(shù)： 58/126頁
文件大?。?/td> 730K
代理商： SAF82525
Semiconductor Group
58
SAB 82525
SAB 82526
SAF 82525
SAF 82526
The following functions have been implemented to facilitate a high-speed and reliable
synchronization (
see figures 28
).
– Interference Rejection
In the case where two or more edges appear in the data stream within a time period of 16
reference clocks, these are detected as interference without performing additional
adjustments.
Figure 28b
– Phase Adjustment
In the case where an edge with a phase angle of 20 to 112 degrees appears in the data stream
within the time window, the phase will be adjusted by 1/16 of the data clock.
Figure 28c
ITT00241
Rec. Data
1
0
DPLL CLK
Phase Adjustment
D
x
R
φ
φ
φ
ITS06029
DPLL
Receiver
Receive
Clock
Receive Data
Reference Clock
16
Data Clock Rate
=
x Nominal
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SAF82525HV2.2 制造商:Lantiq 功能描述:
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SAF82525HV22XT 制造商:Lantiq 功能描述:HSCX
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SAF82525NV2.1 制造商:Infineon Technologies AG 功能描述:
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