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參數(shù)資料
| 型號： | SAF82525 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Data Communications ICs |
| 中文描述： | 數(shù)據(jù)通信集成電路 |
| 文件頁數(shù)： | 3/126頁 |
| 文件大?。?/td> | 730K |
| 代理商： | SAF82525 |
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General Information
Semiconductor Group
3
Table of Contents
1
Features
..................................................................................................................... 6
1.1
Pin Definitions and Functions ................................................................................... 10
1.2
System Integration.................................................................................................... 17
1.3
Functional Description ..............................................................................................22
Operating Modes
.....................................................................................................24
2.1
Auto-Mode (MODE: MDS1, MDS0 = 00) ..................................................................24
2.2
Non-Auto Mode (MODE: MDS1, MDS0 = 01) ..........................................................24
2.3
Transparent Mode 1 (MODE: MDS1, MDS0, ADM = 101) .......................................25
2.4
Transparent Mode 0 (MODE: MDS1, MDS0, ADM = 100) .......................................25
2.5
Extended Transparent Modes 0; 1 (MODE: MDS1, MDS0 = 11) .............................25
2.6
Receive Data Flow (Summary) .................................................................................26
2.7
Transmit Data Flow ...................................................................................................27
Procedural Support (Layer-2 Functions)
..............................................................28
3.1
Full-Duplex LAPB/LAPD Operation ..........................................................................28
3.2
Half-Duplex SDLC-NRM Operation ..........................................................................34
3.3
Error Handling ...........................................................................................................38
4
CPU Interface
..........................................................................................................38
4.1
Register Set.............................................................................................................. 38
4.2
Data Transfer Modes.................................................................................................38
4.3
Interrupt Interface ......................................................................................................39
4.4
DMA Interface........................................................................................................... 43
4.5
FIFO Structure ..........................................................................................................47
Serial Interface (Layer-1 Functions)
......................................................................49
5.1
Clock Modes..............................................................................................................49
5.2
Clock Recovery (DPLL) ............................................................................................ 57
5.3
Bus Configuration ..................................................................................................... 60
5.4
Data Encoding ..........................................................................................................63
5.5
Modem Control Functions (RTS/CTS, CD) ...............................................................63
Special Functions
...................................................................................................65
6.1
Fully Transparent Transmission and Reception .......................................................65
6.2
Cyclic Transmission (Fully Transparent) ...................................................................65
6.3
Continuous Transmission (DMA Mode only) ............................................................66
6.4
Receive Length Check Feature ................................................................................66
6.5
One Bit Insertion .......................................................................................................67
6.6
Data Inversion........................................................................................................... 67
Page
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAB82525N | Data Communications ICs |
| SAB82526 | Data Communications ICs |
| SAB82526N | Data Communications ICs |
| SAF82525N | Data Communications ICs |
| SAF82526 | Data Communications ICs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAF82525HV2.2 | 制造商:Lantiq 功能描述: |
| SAF82525HV22XP | 制造商:Lantiq 功能描述:HSCX |
| SAF82525HV22XT | 制造商:Lantiq 功能描述:HSCX |
| SAF82525N | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Data Communications ICs |
| SAF82525NV2.1 | 制造商:Infineon Technologies AG 功能描述: |
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