參數資料
型號: SAF82525
廠商: INFINEON TECHNOLOGIES AG
英文描述: Data Communications ICs
中文描述: 數據通信集成電路
文件頁數: 70/126頁
文件大小: 730K
代理商: SAF82525
Semiconductor Group
70
SAB 82525
SAB 82526
SAF 82525
SAF 82526
7.2 Initialization
After reset the CPU has to write a minimum set of registers and an optionally set dependent
on the required features and operating modes.
First, the configuration of the serial port and the clock mode has to be defined via the CCR1
register. The clock mode must be set before power-up, or in the same step with power-up.
The CPU may switch the HSCX between power-up and power-down mode, which has no
influence upon the contents of the registers, i.e. the internal state remains stored.
In power-down mode however, all internal clocks and the oscillator circuitry are disabled, no
interrupts are forwarded to the CPU.
This state can be used as standby mode, when the HSCX is temporarily not used, thus
lessening the power consumption to a high degree.
The individual operating mode must be defined writing the MODE register.
The need for programming further registers depends on the selected features (clock mode,
operating mode, address mode, user demands) according to the following tables:
Clock Mode
Register
0, 1
2, 3, 4, 6, 7
BGR, CCR2
5
CCR2, TSAR, TSAX, XCCR, RCCR
Address
Mode
Operating
Mode
2 Byte
Address Field
(MODE: ADM = 1)
1 Byte
Address Field
(MODE: ADM = 0)
Table 8
Register Setup
Auto
Non Auto
RAH1
RAH2
RAL1
RAL2
RAH1 set to 00
H
RAH2 set to 00
H
RAL1
Transparent
RAH1
RAH2
TIMR
XAD1
XAD2
RAH1
RAH2
RAL1
RAL2
RAH1 set to 00
H
RAH2
RAL1
RAL2
相關PDF資料
PDF描述
SAB82525N Data Communications ICs
SAB82526 Data Communications ICs
SAB82526N Data Communications ICs
SAF82525N Data Communications ICs
SAF82526 Data Communications ICs
相關代理商/技術參數
參數描述
SAF82525HV2.2 制造商:Lantiq 功能描述:
SAF82525HV22XP 制造商:Lantiq 功能描述:HSCX
SAF82525HV22XT 制造商:Lantiq 功能描述:HSCX
SAF82525N 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Data Communications ICs
SAF82525NV2.1 制造商:Infineon Technologies AG 功能描述: