參數(shù)資料
型號(hào)： SAA7378GP
廠商： NXP Semiconductors N.V.
英文描述： Single Chip Digital Servo Processor and Compact Disc Decoder
中文描述： 單片機(jī)數(shù)字伺服處理器和光盤(pán)解碼器
文件頁(yè)數(shù)： 8/45頁(yè)
文件大?。?/td> 224K
代理商： SAA7378GP
Philips Semiconductors
Preliminary specification: Version 1.0
May 1995
8
Digital Servo Processor and Compact Disc Decoder (CD7)
SAA7378GP
7.
FUNCTIONAL DESCRIPTION OF THE DECODER PART
7.1
The decoding part operates at single speed and supports a full audio specification.
Principle Operation Modes of the Decoder Part
A simplified data flow through the decoder part is shown in Figure 5.
7.1.1
The SAA7378 which has an internal phase locked loop clock multiplier, can be used with 33.8688, 16.9344 or 8.4672MHz
crystal frequencies by setting register B and SELPLL as shown below.
Crystal Frequency Selection
The internal clock multiplier, controlled by SELPLL, should only be used if an 8.4672MHz crystal, ceramic resonator or
external clock is present.
Note: The CL11 output is a 5.6448MHz clock if a 16.9344MHz external clock is used.
7.1.2
The SAA7378 may be placed in two standby modes, (Note that the device core is still active), selected by register B :
Standby Modes
Standby 1 :
Standby 2:
"CD-STOP" mode. Most I/O functions are switched off.
"CD-PAUSE" mode. Audio output features are switched off, but the motor loop, the motor output and the
subcode interfaces remain active. This is also called a "Hot Pause".
In the standby modes the various pins will have following values:
MOTO1, MOTO2:
Put in Hi-z, PWM mode (standby 1 and reset : operating in standby 2).
Put in Hi-z, PDM mode (standby1 and reset: operating in standby 2).
No interaction. Normal operation continues.
Tri-state in both standby modes. Normal operation continues after reset.
No interaction. Normal operation continues.
No interaction. Normal operation continues.
SCL,SDA, SILD, RAB:
SCLK, WCLK, DATA, CL11, DOBM:
CRIN, CROUT, CL16, CL4:
V1, V2, V3, V4, V5, CFLG:
7.2
The crystal oscillator is a conventional 2 pin design operating at 8 MHz to 35 MHz. This oscillator is capable of working with
ceramic resonators as well as with both fundamental and third overtone crystals. External components should be used to
suppress the fundamental output of the third overtone crystals as shown below in Figure 3. Typical oscillation frequencies
required are 8.4672MHz, 16.9344MHz or 33.8688MHz depending on the internal clock settings used and whether or not the
clock multiplier is enabled.
Crystal Oscillator
Register B
SELPLL
crystal frequency (MHz)
00xx
00xx
01xx
0
1
0
33.8688
8.4672
16.9344
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