參數(shù)資料
型號: SAA7378GP
廠商: NXP Semiconductors N.V.
英文描述: Single Chip Digital Servo Processor and Compact Disc Decoder
中文描述: 單片機數(shù)字伺服處理器和光盤解碼器
文件頁數(shù): 19/45頁
文件大小: 224K
代理商: SAA7378GP
Philips Semiconductors
Preliminary specification: Version 1.0
May 1995
19
Digital Servo Processor and Compact Disc Decoder (CD7)
SAA7378GP
Figure 13 shows the timing, and Figure 14 a typical application diagram.
7.12.1.4
In the CDV motor mode, the FIFO position will be put in pulse-width modulated form on the MOTO1 pin (carrier frequency
300Hz), and the PLL frequency signal will be put in pulse-density modulated form (carrier frequency 4.23MHz) on the
MOTO2 pin. The integrated motor servo is disabled in this mode.
CDV/CAV Output Mode
Notes:
1)
The PWM signal on MOTO1 corresponds to a total memory space of 20 frames, therefore the nominal FIFO
position (half full) will result in a PWM output of 60%.
7.12.2
The motor servo has the following operation modes controlled by register 1:
Start mode 1 Disc is accelerated by applying a positive voltage to the spindle motor. No decisions are involved and the
PLL is reset. No Disc speed information is available for the
μ
P.
Start mode 2 The Disc is accelerated as in Start mode 1 however the PLL will monitor the Disc speed. When the Disc
reaches 75% of its nominal speed, the controller will switch to Jump mode The motor status signals
selectable via register 2 are valid.
Jump mode
Motor servo enabled but FIFO kept reset at 50%, integrator is held. The audio is muted but it is possible
to read the subcode.
Jump mode 1 Similar to Jump modebut motor integrator is kept at zero. Used for long jumps, where there is a large
change in disc speed.
Spindle Motor Operating Modes
Accelerate
Brake
t
rep
= 45
μ
s
t
dead
= > 240 ns
MOTO1
MOTO2
t
ovl
= 240 ns
V4
V5
Figure 13 4-Line PWM Mode Timing
MOTO1
MOTO2
V4
V5
+
M
Figure 14 Motor 4-Line PWM Mode Application Diagram
10
100n
V
SS
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