參數(shù)資料
型號(hào): SAA7378GP
廠商: NXP Semiconductors N.V.
英文描述: Single Chip Digital Servo Processor and Compact Disc Decoder
中文描述: 單片機(jī)數(shù)字伺服處理器和光盤解碼器
文件頁數(shù): 14/45頁
文件大?。?/td> 224K
代理商: SAA7378GP
Philips Semiconductors
Preliminary specification: Version 1.0
May 1995
14
Digital Servo Processor and Compact Disc Decoder (CD7)
SAA7378GP
7.7.3
A 1-sample linear interpolator becomes active if a single sample is flagged as erroneous but cannot be corrected. The
erroneous sample is replaced by a level midway between the preceding and following samples. Left and right channels have
independent interpolators. If more than one consecutive non-correctable sample is found, the last good sample is held. A 1-
sample linear interpolation is then performed before the next good sample (Figure 7). .
Concealment
7.7.4
A digital level controller is present on the SAA7378 which performs the functions of soft mute, full scale, attenuation and
fade; these are selected via register 0.
Mute, Full Scale, Attenuation and Fade
Mute:
Attenuate:
Full scale:
Fade:
signal reduced to 0 in a maximum of 128 steps; 3ms.
signal scaled by -12dB.
ramp signal back to 0dB level. From mute takes 3ms.
activates a 128 stage counter which allows the signal to be scaled up/down by 0.07dB steps.
128 = full scale
120 = -0.5dB (ie. full scale if oversampling filter used)
32 = -12dB
0
= mute
7.7.5
The peak detector measures the highest audio level (absolute value) on positive peaks for left and right channels. The 8
most significant bits are output in the Q-channel data in place of the CRC bits. Bits 81 to 88 contain the left peak value (bit
88 = MSB) and bits 89 to 96 contain the right peak value (bit 96 = MSB). The values are reset after reading Q-channel data
via SDA.
Peak Detector
Interpolation
Interpolation
Hold
OK
Error
OK
OK
OK
Error
Error
Error
Figure 7 Concealment Mechanism
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