參數(shù)資料
型號: SAA7205
廠商: NXP Semiconductors N.V.
英文描述: MPEG-2 systems demultiplexer
中文描述: MPEG - 2系統(tǒng)解復(fù)用器
文件頁數(shù): 8/84頁
文件大小: 363K
代理商: SAA7205
1997 Jan 21
8
Philips Semiconductors
Preliminary specification
MPEG-2 systems demultiplexer
SAA7205H
RAMA10
V
DDD2(core)
MDAT0
MDAT1
MDAT2
MDAT3
MDAT4
MDAT5
MDAT6
MDAT7
V
SSD2(core)
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
V
DDD5
MA10
R/W
CSVID
CSDEM
IRQ
NMI
POR
VSEL
V
SSD5
PKTSYNC
PKTDATV
PKTBAD/
PKTBAD
PKTDAT7
PKTDAT6
PKTDAT5
PKTDAT4
V
SSD6
PKTDAT3
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
O
external SRAM address bus output bit 10
digital supply voltage 2 for core (+3.3 V)
microcontroller bidirectional data bus bit 0
microcontroller bidirectional data bus bit 1
microcontroller bidirectional data bus bit 2
microcontroller bidirectional data bus bit 3
microcontroller bidirectional data bus bit 4
microcontroller bidirectional data bus bit 5
microcontroller bidirectional data bus bit 6
microcontroller bidirectional data bus bit 7
digital ground 2 for core
microcontroller MSByte/LSByte indicator input bit 0
microcontroller address/data indicator input bit 1
microcontroller address input bit 2 for direct access to selected registers
microcontroller address input bit 3 for direct access to selected registers
microcontroller address input bit 4 for direct access to selected registers
microcontroller address input bit 5 for direct access to selected registers
microcontroller address input bit 6 for direct access to selected registers
microcontroller address input bit 7 for direct access to selected registers
microcontroller address input bit 8 for direct access to selected registers
microcontroller address input bit 9 for direct access to selected registers
digital supply voltage 5 (+5 V)
microcontroller direct addressing/indirect addressing indicator input bit 10
read/write input selection
(audio)/video decoder chip select input (active LOW)
demultiplexer chip select input (active LOW)
interrupt request output for microcontroller (active LOW, open-drain)
non-maskable interrupt output for VOUT bus access handling (open-drain)
power-on reset input
video input select signal (bus control by microcontroller)
digital ground 5
indicates the first input byte (sync) of a transport packet
valid input data indicator
packet error indicator input (programmable polarity)
supply
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
I
I
I
I
I
I
I
I
I
I
supply
I
I
I
I
O
O
I
I
GND
I
I
I
109
110
111
112
113
114
I
I
I
I
8-bit wide modem data input bit 7
8-bit wide modem data input bit 6
8-bit wide modem data input bit 5
8-bit wide modem data input bit 4
digital ground 6
8-bit wide modem data input bit 3
GND
I
SYMBOL
PIN
I/O
DESCRIPTION
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