
1997 Jan 21
4
Philips Semiconductors
Preliminary specification
MPEG-2 systems demultiplexer
SAA7205H
2
GENERAL DESCRIPTION
This document specifies the MPEG-2 systems demultiplexer IC, SAA7205H, for use in MPEG-2 based digital TV
receivers, possibly incorporating conditional access. Such receivers are to be implemented in, for instance, a Digital
Video Broadcasting (DVB) set-top box, or Integrated Receiver Decoder (IRD). An example of a
demultiplexer/descrambler system configuration, containing a channel decoder module, source decoders, a system
microcontroller and a conditional access system is shown in Fig.1. The main function of the demultiplexer is to separate
relevant data from an incoming MPEG-2 systems compliant data stream and pass it to both the individual source
decoders and to the system microcontroller. To support descrambling, the demultiplexer interfaces with the descrambler
part of a conditional access system (optional). The demultiplexer therefore generates a 9 MHz descrambler chip clock.
3
QUICK REFERENCE DATA
4
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DDD
V
DDD(core)
P
tot
f
CLK
T
amb
digital supply voltage
digital supply voltage for core
total power consumption
clock frequency
operating ambient temperature
4.5
3.0
0
5.0
3.3
5.5
3.6
380
27
70
V
V
mW
MHz
°
C
f
byte
≤
9 MHz
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
SAA7205H
QFP128
plastic quad flat package; 128 leads (lead length 1.6 mm);
body 28
×
28
×
3.4 mm; high stand-off height
SOT320-2
Fig.1 Demultiplexer system configuration.
handbook, full pagewidth
MGG374
CONDITIONAL
ACCESS
SYSTEM
DEMODULATOR PLUS
FORWARD ERROR
CORRECTOR
(AND DESCRAMBLER)
MICROCONTROLLER
SAA7205H
9 MHz DCLK
32K x 8
SRAM
AUDIO
SOURCE
DECODER
VIDEO
SOURCE
DECODER
TELETEXT
DECODER