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參數(shù)資料
| 型號： | SAA5647HL |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Enhanced TV microcontrollers with On-Screen Display (OSD)(帶全屏顯示的增強型TV控制器) |
| 中文描述： | 與微控制器在強化電視屏幕顯示（OSD）（帶全屏顯示的增強型電視控制器） |
| 文件頁數(shù)： | 48/112頁 |
| 文件大小： | 436K |
| 代理商： | SAA5647HL |
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2000 Jun 30
48
Philips Semiconductors
Objective specification
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
18.4
UART baud rates
Remark:
f
clk
used in the following calculations refers to the
microcontroller clock frequency (6 or 12 MHz).
The serial port can operate with different baud rates,
depending on its mode. The baud rate in mode 0 is derived
from state 2 and state 5, and thus fixed:
Mode 0 baud rate =
1
6
f
clk
The baud rate in mode 2 depends on the value of
bit SMOD:
If SMOD = 0, the baud rate is
1
32
f
clk
If SMOD = 1, the baud rate is
1
16
f
clk
Mode 2 baud rate =
.
The baud rates in modes 1 and 3 are determined by the
timer overflow rate and the value of SMOD as follows:
Modes 1 and 3
SMOD
32
baud rate =
Modes 1 and 3 baud rate =
1
16
×
Timer 2 overflow rate.
In this application, the Timer 1 interrupt should be
disabled. The Timer can be configured for either ‘timer’ or
‘counter’ operation in any of its three running modes. In the
most typical applications, it is configured for ‘timer’
operation. In the auto-reload mode (high nibble of
TMOD = 0010B), the baud rate is given by the formula:
Modes 1 and 3 baud rate =
.
Very low baud rates can be achieved with Timer 1 by
leaving the Timer 1 interrupt enabled and configuring the
Timer to run as a 16-bit timer (high nibble of
TMOD = 0001B), plus using the Timer 1 interrupt to do a
16-bit software reload.
Timer 2 has a programming mode to function as baud rate
generator for the UART. In this mode, the baud rate is
given by the formula:
Modes 1 and 3 baud rate =
.
For further details on the UART operation, refer to
"Handbook IC20 80C51-Based 8-Bit Microcontrollers”
19 LED SUPPORT
Port pins P0.5 and P0.6 have an 8 mA current sinking
capability to enable LEDs in series with current limiting
resistors to be driven directly, without the need for
additional buffering circuits.
20 EXTERNAL SRAM/ROM INTERFACE
The external address/data bus of the 80C51
microprocessor may be interfaced to:
Additional SRAM Data memory for multi-page
acquisition applications
External Program ROM.
The application circuit can be achieved using either the
multiplexed address and data I/O or the de-multiplexed
address and data I/O.
It is possible to interface up to 256 kbytes of external data
memory using pins RAMBK<1:0> and A15_BK. Each of
the four Data memory banks is selected by
RAMBK<1:0> (SFR ROMBK<4:3>), as follows:
Table 20
RAMBK selection
It is possible to interface up to 192 kbytes of external
program ROM, which is addressed using the contiguous
address bus (A17_LN, A16_LN, A15_LN).
Remark:
Although this is an 18-bit bus, the internal
microcontroller logic makes it possible to only address
192 bytes with linear addressing.
Figs. 12 and 13 show the interfacing connections for both
external SRAM Data memory and external program
memory.
SMOD
32
2
f
clk
×
2
Timer 1 overflow rate
×
SMOD
32
2
f
6
256
T1H
–
(
)
×
------------------------------------------
×
16
f
256
T2H
–
(
)
×
6
×
RAMBK<1:0>
BANK
EXTERNAL
ADDRESS RANGE
00
01
10
11
Bank 0
Bank 1
Bank 2
Bank 3
0 to 64 kbytes
64 to 128 kbytes
128 to 192 kbytes
192 to 256 kbytes
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相關代理商/技術參數(shù) |
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| SAA5665 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced TV microcontrollers with On-Screen Display OSD |
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