參數(shù)資料
型號(hào): SAA5647HL
廠商: NXP Semiconductors N.V.
英文描述: Enhanced TV microcontrollers with On-Screen Display (OSD)(帶全屏顯示的增強(qiáng)型TV控制器)
中文描述: 與微控制器在強(qiáng)化電視屏幕顯示(OSD)(帶全屏顯示的增強(qiáng)型電視控制器)
文件頁數(shù): 22/112頁
文件大小: 436K
代理商: SAA5647HL
2000 Jun 30
22
Philips Semiconductors
Objective specification
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
Timer2 Reload Capture Low Byte (RCAP2L)
RCAP2L7 to RCAP2L0
Timer 2 capture/reload low byte
ROM Bank (ROMBK)
STANDBY
IIC_LUT1 to IIC_LUT0
standby activation bit
I
2
C-bus lookup table selection; IIC_LUT<1:0>:
00 = P8xC558 normal mode
01 = P8xC558 fast mode
10 = P8xC558 slow mode
11 = reserved
RAM Bank selection bits RAMBK<1:0>:
00 = Bank 0 (0 to 64 kbytes)
01 = Bank 1 (64 to 128 kbytes)
10 = Bank 2 (128 to 192 kbytes)
11 = Bank 3 (192 to 256 kbytes)
ROM Bank selection bits ROMBK<2:0>:
000 = Bank 0 (32 to 64 kbytes)
001 = Bank 1 (64 to 96 kbytes)
010 = Bank 2 (96 to 128 kbytes)
011 = Bank 3 (128 to 160 kbytes)
100 = Bank 4 (160 to 192 kbytes)
101 to 111 = reserved
RAMBK1 to RAMBK0
ROMBK2 to ROMBK0
UART Buffer (S0BUF)
S0BUF7 to S0BUF0
UART data buffer
UART Control Register (S0CON)
SM0 to SM1
UART mode selection bits SM<0:1>:
00, Shift Register
01, 9-bit UART
10, 8-bit UART (variable baud rate)
11, 9-bit UART (variable baud rate)
Enables the multiprocessor communication feature in Modes 2 and 3. In
Mode 2 or 3, if SM2 is set, then RI will not be activated, RB8 and S0BUF will not
be loaded if the received 9
th
data bit is logic 0. In Mode 1, if SM2 is set, then RI
will not be activated, RB8 and S0BUF will not be loaded if no valid stop bit was
received. In Mode 0, SM2 has no influence.
Enables serial reception. Set by software to enable reception. Cleared by
software to disable reception.
Is the 9
th
data bit that will be transmitted in Modes 2 and 3. Set or cleared by
software as desired.
In Modes 2 and 3, RB8 is the 9
th
data bit that was received. In Mode 1, if SM2 is
logic 0, RB8 is the stop bit that was received. In Mode 0, RB8 is not used.
Loading of RB8 in Modes 1, 2 and 3 depends on SM2.
SM2
REN
TB8
RB8
BITS
FUNCTION
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