參數(shù)資料
型號: SAA5647HL
廠商: NXP Semiconductors N.V.
英文描述: Enhanced TV microcontrollers with On-Screen Display (OSD)(帶全屏顯示的增強型TV控制器)
中文描述: 與微控制器在強化電視屏幕顯示(OSD)(帶全屏顯示的增強型電視控制器)
文件頁數(shù): 24/112頁
文件大?。?/td> 436K
代理商: SAA5647HL
2000 Jun 30
24
Philips Semiconductors
Objective specification
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
AA
Assert Acknowledge flag.
When this bit is set, an acknowledge is returned
after any one of the following conditions:
Own slave address is received
General call address is received (S1ADR.GC = 1)
A data byte is received, while the device is programmed to be a master receiver
A data byte is received, while the device is selected slave receiver.
When the bit is reset, no acknowledge is returned. Consequently, no interrupt is
requested when the own address or general call address is received.
I
2
C-bus Data Register (S1DAT)
DAT7 to DAT0
I
2
C-bus data
I
2
C-bus Status Register (S1STA)
STAT4 to STAT0
I
2
C-bus interface status
Software ADC Register (SAD)
VHI
CH1 to CH0
analog input voltage greater than DAC voltage (logic 1)
ADC input channel select bits; CH<1:0>:
00 = ADC3
01 = ADC0
10 = ADC1
11 = ADC2
initiate voltage comparison between ADC input channel and SAD value
4 MSBs of DAC input word
ST
(1)
SAD7 to SAD4
Software ADC Control Register (SADB)
DC_COMP
SAD3 to SAD0
enable DC comparator mode (logic 1)
4 LSBs of SAD value
Stack Pointer (SP)
SP7 to SP0
stack pointer value
Timer/counter Control Register (TCON)
TF1
Timer 1 overflow flag.
Set by hardware on Timer/counter overflow. Cleared by
hardware when processor vectors to interrupt routine.
Timer 1 run control bit.
Set/cleared by software to turn Timer/counter on/off.
Timer 0 overflow flag.
Set by hardware on Timer/counter overflow. Cleared by
hardware when processor vectors to interrupt routine.
Timer 0 run control bit.
Set/cleared by software to turn Timer/counter on/off.
Interrupt 1 edge flag.
Both edges generate flag. Set by hardware when external
interrupt edge detected. Cleared by hardware when interrupt processed.
Interrupt 1 type control bit.
Set/cleared by software to specify edge/low level
triggered external interrupts.
Interrupt 0 Edge l flag.
Set by hardware when external interrupt edge detected.
Cleared by hardware when interrupt processed.
Interrupt 0 type flag.
Set/cleared by software to specify falling edge/low level
triggered external interrupts.
TR1
TF0
TR0
IE1
IT1
IE0
IT0
BITS
FUNCTION
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