參數(shù)資料
型號(hào)： SAA5647HL
廠(chǎng)商： NXP Semiconductors N.V.
英文描述： Enhanced TV microcontrollers with On-Screen Display (OSD)(帶全屏顯示的增強(qiáng)型TV控制器)
中文描述： 與微控制器在強(qiáng)化電視屏幕顯示（OSD）（帶全屏顯示的增強(qiáng)型電視控制器）
文件頁(yè)數(shù)： 46/112頁(yè)
文件大小： 436K
代理商： SAA5647HL
2000 Jun 30
46
Philips Semiconductors
Objective specification
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA56xx
17.1
I
2
C-bus modes
Three different I
2
C-bus selection tables for CR<2:0> can
be configured using the ROMBK SFR (IIC_LUT<1:0>), as
shown in Table 16.
17.1.1
N
OMINAL MODE
(IIC_LUT<1:0> = 00)
This option accommodates the P8xC558 I
2
C-bus, refer to
“Handbook IC20 80C51-Based 8-Bit Microcontrollers”
The various serial rates are shown in Table 16:
Table 16
I
2
C-bus serial rates in ‘P8xC558 nominal mode’
17.1.2
F
AST MODE
(IIC_LUT<1:0> = 01)
This option accommodates the P8xC558 I
2
C-bus doubled
rates, as shown in Table 17:
Table 17
I
2
C-bus serial rates in ‘P8xC558 fast mode’
17.1.3
S
LOW MODE
’ (IIC_LUT<1:0> = 10)
This option accommodates the P8xC558 I
2
C-bus rates,
divided by 2, as shown in Table 18:
Table 18
I
2
C-bus serial rates ‘P8xC558 slow mode’
Remark:
In Table 16 to Table 18, the f
clk
relates to the
clock input of the 80C51 I
2
C-bus module (6 MHz,
12 MHz).
17.2
I
2
C-bus port selection
Two I
2
C-bus ports are available: SCL0/SDA0 and
SCL1/SDA1. The ports are selected by using TXT21.I
2
C
Port 0 and TXT21.I
2
C Port 1. When a port is enabled, any
information transmitted from the device goes onto the
enabled port. Information transmitted to the device can
only be acted on if the port is enabled.
If both ports are enabled, then data transmitted from the
device is seen on both ports. However, data transmitted to
the device on one port cannot be seen on the other port.
CR2
CR1
CR0
f
clk
DIVIDE BY
I
2
C-BUS BIT
FREQUENCY (kHz)
AT f
clk
6 MHz
12 MHz
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
60
1600
40
30
240
3200
160
120
100
3.75
150
200
25
1.875
37.5
50
200
7.5
300
400
50
3.75
75
100
CR2
CR1
CR0
f
clk
DIVIDE BY
I
2
C-BUS BIT
FREQUENCY (kHz)
AT f
clk
6 MHz
12 MHz
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
30
800
20
15
120
1600
80
60
200
7.5
300
400
50
3.75
75
100
400
15
600
800
100
7.5
150
200
CR2
CR1
CR0
f
clk
DIVIDE BY
I
2
C-BUS BIT
FREQUENCY (kHz)
AT f
clk
6 MHz
12 MHz
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
120
3200
80
60
480
6400
320
240
50
100
3.75
150
200
25
1.875
37.5
50
1.875
75
100
12.5
0.9375
18.75
25
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