667
32072H–AVR32–10/2012
AT32UC3A3
0x031C
Device DMA Channel 1 Status Register
UDDMA1
STATUS
Read/Write
0x00000000
0x0320
Device DMA Channel 2 Next Descriptor
Address Register
UDDMA2
NEXTDESC
Read/Write
0x00000000
0x0324
Device DMA Channel 2 HSB Address Register
UDDMA2
ADDR
Read/Write
0x00000000
0x0328
Device DMA Channel 2 Control Register
UDDMA2
CONTROL
Read/Write
0x00000000
0x032C
Device DMA Channel 2 Status Register
UDDMA2
STATUS
Read/Write
0x00000000
0x0330
Device DMA Channel 3 Next Descriptor
Address Register
UDDMA3
NEXTDESC
Read/Write
0x00000000
0x0334
Device DMA Channel 3 HSB Address Register
UDDMA3
ADDR
Read/Write
0x00000000
0x0338
Device DMA Channel 3 Control Register
UDDMA3
CONTROL
Read/Write
0x00000000
0x033C
Device DMA Channel 3 Status Register
UDDMA3
STATUS
Read/Write
0x00000000
0x0340
Device DMA Channel 4 Next Descriptor
Address Register
UDDMA4
NEXTDESC
Read/Write
0x00000000
0x0344
Device DMA Channel 4 HSB Address Register
UDDMA4
ADDR
Read/Write
0x00000000
0x0348
Device DMA Channel 4 Control Register
UDDMA4
CONTROL
Read/Write
0x00000000
0x034C
Device DMA Channel 4 Status Register
UDDMA4
STATUS
Read/Write
0x00000000
0x0350
Device DMA Channel 5 Next Descriptor
Address Register
UDDMA5
NEXTDESC
Read/Write
0x00000000
0x0354
Device DMA Channel 5 HSB Address Register
UDDMA5
ADDR
Read/Write
0x00000000
0x0358
Device DMA Channel 5 Control Register
UDDMA5
CONTROL
Read/Write
0x00000000
0x035C
Device DMA Channel 5 Status Register
UDDMA5
STATUS
Read/Write
0x00000000
0x0360
Device DMA Channel 6 Next Descriptor
Address Register
UDDMA6
NEXTDESC
Read/Write
0x00000000
0x0364
Device DMA Channel 6 HSB Address Register
UDDMA6
ADDR
Read/Write
0x00000000
0x0368
Device DMA Channel 6 Control Register
UDDMA6
CONTROL
Read/Write
0x00000000
0x036C
Device DMA Channel 6 Status Register
UDDMA6
STATUS
Read/Write
0x00000000
0x0370
Device DMA Channel 7 Next Descriptor
Address Register
UDDMA7
NEXTDESC
Read/Write
0x00000000
Table 27-4.
USBB Register Memory Map
Offset
Register
Name
Access
Reset Value