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| 型號(hào)： | S29PL129N65FFIW00 |
| 廠商： | Spansion Inc. |
| 英文描述： | 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| 中文描述： | 256/128/128字節(jié)（16/8/8 M中的x 16位），3.0伏的CMOS只同步讀/寫，頁(yè)模式閃存 |
| 文件頁(yè)數(shù)： | 75/85頁(yè) |
| 文件大小： | 940K |
| 代理商： | S29PL129N65FFIW00 |
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November 23, 2005 S29PL-N_00_A4
S29PL-N MirrorBit Flash Family
73
P r e l i m i n a r y
12 Appendix
This section contains information relating to software control or interfacing with the Flash device.
For additional information and assistance regarding software, see
Additional Resources
, or ex-
plore the Web at
www.amd.com
and
www.fujitsu.com
.
Table 12.1 Memory Array Commands
Command Sequence
(Notes)
C
1
1
4
Bus Cycles (Notes
1
–
6
)
Third
Addr
Data
First
Second
Fourth
Addr
Fifth
Sixth
Addr
RA
XXX
555
Data Addr Data
RD
F0
AA
2AA
Data
Addr
Data
Addr
Data
Read (
7
)
Reset (
8
)
Auto-
select
(
9
)
Manufacturer ID
55
[BA]555
90
[BA]X00 0001
Device ID (
10
)
6
555
AA
2AA
55
[BA]555
90
[BA]X01 227E [BA]X0E
(
Note
10
)
[BA]X0F 2200
Indicator Bits
4
555
AA
2AA
55
[BA]555
90
[BA]X03(
Note
11
)
Data
WC
Program
Write to Buffer (
17
)
Program Buffer to Flash
Write to Buffer Abort Reset (
17
)
Chip Erase
Sector Erase
Program/Erase Suspend (
14
)
Program/Erase Resume (
15
)
CFI Query (
16
)
Unlock Bypass Entry
Unlock Bypass Program (
12
,
13
)
Unlock Bypass Sector Erase (
12
,
13
)
Unlock Bypass Erase (
12
,
13
)
Unlock Bypass CFI (
12
,
13
)
Unlock Bypass Reset
Secured Silicon Sector Command Definitions
Secured Silicon Sector Entry (
18
)
Secured Silicon Sector Program
Secured Silicon Sector Read
Secured Silicon Sector Exit (
19
)
4
6
1
3
6
6
1
1
1 [BA]555
3
555
2
2
2
1
2
555
555
SA
555
555
555
BA
BA
AA
AA
29
AA
AA
AA
B0
30
98
AA
A0
80
80
98
90
2AA
2AA
55
55
555
SA
A0
25
PA
SA
PA
PD
WBL
PD
2AA
2AA
2AA
55
55
55
555
555
555
F0
80
80
555
555
AA
AA
2AA
2AA
55
55
555
SA
10
30
Unlock
Bypass
Mode
2AA
PA
SA
XXX
55
PD
30
10
555
20
XX
XX
XX
BA
XX
XXX
00
Secured
Silicon
Sector
3
2
1
4
555
XX
RA
555
AA
A0
data
AA
2AA
PA
55
data
555
88
2AA
55
555
90
XX
00
Legend:
X = Don’t care.
RA = Read Address.
RD = Read Data.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE# pulse whichever
happens later.
PD = Program Data. Data latches on the rising edge of WE# or CE#
pulse, whichever occurs first.
SA = Sector Address. PL127/129N = A22 – A15;
PL256N = A23 – A15.
BA = Bank Address. PL256N = A23 – A21; PL127N = A22 – A20;
PL127N = A21 – A20.
WBL = Write Buffer Location. Address must be within the same write
buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes:
1.
2.
3.
See (
Table 7.1
) for description of bus operations.
All values are in hexadecimal.
Except for the following, all bus cycles are write cycle: read
cycle, fourth through sixth cycles of the Autoselect commands,
fourth cycle of the password verify command, and any cycle
reading at RD(0) and RD(1).
Data bits DQ15 – DQ8 are don’t care in command sequences,
except for RD, PD, WD, PWD, and PWD3 – PWD0.
Unless otherwise noted, these address bits are
don’t cares:
PL127: A22 – A15; 129N: A21 – A15; PL256N: A23 – A14.
Writing incorrect address and data values or writing them in the
improper sequence may place the device in an unknown state.
The system must write the reset command to return the device
to reading array data.
No unlock or command cycles required when bank is reading
array data.
The Reset command is required to return to reading array data
(or to the erase-suspend-read mode if previously in Erase
Suspend) when a bank is in the autoselect mode, or if DQ5 goes
high (while the bank is providing status information) or
performing sector lock/unlock.
4.
5.
6.
7.
8.
9.
The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address. See
Autoselect
.
10. Device IDs: PL256N = 223Ch; PL127N = 2220h;
PL129N = 2221h.
11. See
Autoselect
.
12. The Unlock Bypass command sequence is required prior to this
command sequence.
13. The Unlock Bypass Reset command is required to return to
reading array data when the bank is in the unlock bypass mode.
14. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
15. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
16. The total number of cycles in the command sequence is
determined by the number of words written to the write buffer.
The maximum number of cycles in the command sequence is 37.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29PL129N65FFIW02 | 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| S29PL129N65FFIW03 | 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| S29PL129N65FFW000 | 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| S29PL129N65FFW002 | 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| S29PL129N65FFW003 | 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29PL129N65FFIW02 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| S29PL129N65FFIW03 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| S29PL129N65FFW000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| S29PL129N65FFW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
| S29PL129N65FFW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
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