參數(shù)資料
型號(hào): S1R72803F00A100
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP100
封裝: 0.40 MM PITCH, PLASTIC, QFP20-184
文件頁數(shù): 75/115頁
文件大?。?/td> 833K
代理商: S1R72803F00A100
S1R72803F00A
58
EPSON
Address Register Name
Bit Symbol
R/W
Description
H.Rst S.Rst B.Rst
0x2A
CmprIndex
7:
0:
1:
6:
0:
1:
5:
0:
1:
4:
0:
1:
0x00
3: Compare Index[3]
2: Compare Index[2]
R/W
Compare Address Index
1: Compare Index[1]
0: Compare Index[0]
0x2B
CmprWindow
7: Compare Window[7]
6: Compare Window[6]
5: Compare Window[5]
4: Compare Window[4]
R/W
Compare Address Window
0x00
3: Compare Window[3]
2: Compare Window[2]
1: Compare Window[1]
0: Compare Window[0]
Compare Offset Address Index Window Register
This register sets a compare offset address.
When the BlkWrAreaSet bit is “1” and a BlockWriteRequest packet having an Destination_Offset address same
as a value set to this register is received, the received data of payload is received by the RxStreamArea.
0x2A Compare Index
This is a register to set an index number to select a channel.
0x2B Compare Window
This is a register to view a window specified by the Compare Index.
Compare Destination Offset Address
When the BlkWrAreaSet bit is “1” and a BlockWriteRequest packet having an Destination_Offset address same
as a value set to this register is received, the received data of payload is received by the RxStreamArea. This
address is valid when the BlkWrAreaSel bit of the AsyDmaCtl Register is “1”.
Compare Address Index/Window Register
ChnlIndex
ChnlWindow
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
0x00
CompareDOffset0
(MSB)
0x01
CompareDOffset1
0x02
CompareDOffset2
Compare Destination Offset Address[47:0]
0x03
CompareDOffset3
0x04
CompareDOffset4
0x05
CompareDOffset5
(LSB)
0x06
(Reserved)
:
(Reserved)
0x0F
(Reserved)
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